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參數(shù)資料
| 型號： | LC74950BG |
| 廠商： | SANYO SEMICONDUCTOR CO LTD |
| 元件分類： | 消費家電 |
| 英文描述： | SPECIALTY CONSUMER CIRCUIT, PBGA96 |
| 封裝： | 6 X 6 MM, FBGA-96 |
| 文件頁數(shù)： | 21/37頁 |
| 文件大?。?/td> | 350K |
| 代理商： | LC74950BG |
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LC74950BG
No.A1647-28/37
Concerning the time constant setting
A difference between the pedestal level of the 9-bit (0-511) video signals and set digital clamp level is obtained
through digital clamp processing as shown in the figure below. The result of multiplying this difference by the 1/X
time constant is added to the input signals and output. In this way, the level is changed gradually to the set digital
clamp level. The time constant is set using TCDIGCLP[2:0].
8. Gain
1) Gain adjustments
Registers related to gain adjustments
Name
Functions
Sub address
bit width
SELYCRGB
This register switches between YCbCr input and RGB input.
0: YCbCr, 1: RGB
0x14
1
SYNCON
This register turns ON and OFF the function to adjust the gain by cutting off the sync
component of the digitally clamped Y video signal for YCbCr input.
This must be set to 0 for the RGB input (SELYCRGB=1).
0: ON, 1: OFF
0x1B
1
CNLINE
This register sets the nonlinear gain adjustment to ON or OFF.
0: OFF (linear gain adjustment)
1: ON (nonlinear gain adjustment)
0x19
1
COFFSET
This register adjusts the nonlinear gain region when the nonlinear gain adjustment is ON
(CNLINE=1).
0x1C
5
GAINY
Linear gain adjustment (YG)
The multipliers for linear gain adjustment are given below.
Y (SELYCRGB=0): (32+GAINY[6:0])/64
G (SELYCRGB=1): (48+GAINY[6:0])/64
0x19
7
GAINCB
Linear gain adjustment (CBB)
The multiplier is set to (48+GAINCB[6:0])/64 for linear gain adjustment.
0x1A
7
GAINCR
Linear gain adjustment (CRR)
The multiplier is set to (48+GAINCR[6:0])/64 for linear gain adjustment.
0x1B
7
Gain adjustment specifications
The digitally clamped 9-bit video signals are converted into 8-bit video signals as shown in the figure below. In this
case, the digital clamp level is shifted to the LSB of the 8 bits, and gain is adjusted in such a way that the components
(video signals) above the digital clamp level fit in the 8-bit range.
-
Pedestal level detection
Digital clamp level
setting value
Input
Output
1/X
9 bits
8 bits
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| LC74950BG-TLM-H | 功能描述:視頻模擬/數(shù)字化轉換器集成電路 RoHS:否 制造商:Texas Instruments 輸入信號類型:Differential 轉換器數(shù)量:1 ADC 輸入端數(shù)量:4 轉換速率:3 Gbps 分辨率:8 bit 結構: 輸入電壓:3.3 V 接口類型:SPI 信噪比: 電壓參考: 電源電壓-最大:3.45 V 電源電壓-最小:3.15 V 最大功率耗散: 最大工作溫度:+ 85 C 最小工作溫度:- 40 C 封裝 / 箱體:TCSP-48 封裝:Reel |
| LC74980W | 制造商:未知廠家 制造商全稱:未知廠家 功能描述: |
| LC74981W | 制造商:未知廠家 制造商全稱:未知廠家 功能描述: |
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| LC749870W | 制造商:SANYO 制造商全稱:Sanyo Semicon Device 功能描述:Silicon gate NTSC/PAL/SECAM Digital Video Decoder |
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