LC750512E
No.A0179-2/9
S3S mode
Effect
Algorithm (Name)
Remarks
Low frequency enhancement
S-Live
SANYO’s proprietary low frequency enhancement algorithm
Surround
Digital AViSS
SANYO’s proprietary sound field control algorithm
The audio processing functions listed in the table below can be installed by making changes to the program ROM.
(These functions have not been installed in the LC750512E).
Effect
Algorithm (Name)
Remarks
Surround
Dolby Prologic II
Registered trademark of Dolby Laboratories, Inc.
Low frequency enhancement
TruBass
Registered trademark of SRS Labs, Inc.
Sound field correction
Focus
Registered trademark of SRS Labs, Inc.
Virtual surround
SRS 3D,TruSurround
Registered trademark of SRS Labs, Inc.
Low- and high-frequency enhancement
Dedekind
Registered trademark of Dedekind R&D
Low- and high-frequency augumentation
Note 1: Users must be licensees of the algorithms listed. Model names are subject to change.
Note 2: Processing estimates for using the algorithms will be based on the combinations in which the desired functions
are used.
3. Microcontroller interface
CCB and I
2
C support
4. Supply voltages
Analog: 3.3V, 5V
Digital: 1.8V, 3.3V
Specifications
Absolute Maximum Ratings
at VSS = 0V, AVSS = 0V
BBE
Registered trademark of BBE Sound Inc.
Ratings
Parameter
Symbol
Conditions
min
typ
max
unit
Supply voltage
(A/D, D/A, volume, etc.)
Supply voltage
(A/D, D/A, volume, etc.)
Supply voltage (crystal oscillator)
VDD max1
AVDD1, AVDD2, AVDD3
-0.3
+6.0
V
VDD max1
BVDD1
-0.3
+3.96
V
VDD max2
VDD max3
XVDD
CVDD1, CVDD2, CVDD3, CVDD4
DVDD1, DVDD2, DVDD3, DVDD4
PLLDVDD, PLLAVDD, PLLPWRR
INL, INR
EVRINL, EVRINR
TEST0, TEST1, TEST2, TEST3, TEST4,
TEST5, TEST6, TEST7
SCKI, LRCKI, BCKI, DATAI, CE, SCL/CL,
I
2
CBUSY/DI, SDA/DO, MCUIFSEL,
XPDESC, RSTB, PWDB, INTB, XSEL0,
XSEL1, XSEL2
CVDD
Conditions: audio disabled operating state,
mounted on a standard board*
SDA/DO
-0.3
+3.96
V
Supply voltage
(I/O interface block )
Supply voltage
(DSP core block, PLL block)
-0.3
+3.96
V
VDD max4
-0.3
+2.16
V
Maximum input voltage
(A/D, D/A, volume, etc.)
Maximum input voltage
(DSP core block)
(I/O interface block)
VIN1
-0.3
AVDD+0.3
(max+6.0V)
V
VIN2
-0.3
CVDD+0.3
(max+3.96V)
V
Maximum output voltage
VOUT
Pd max
-0.3
CVDD+0.3
V
Allowable power dissipation
850
mW
Maximum output current
IO
Topr
0
4
mA
Operating temperature
-20
+75
°
C
Storage temperature
*
: Standard board: 76.1mm
×
114.3mm
×
1.6mm; glass epoxy resin
Tstg
-55
+125
°
C