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參數(shù)資料
| 型號： | LC866524 |
| 廠商： | Sanyo Electric Co.,Ltd. |
| 英文描述： | 8-Bit Single Chip Microcontroller with the UVEPROM |
| 中文描述： | 8位單片機微控制器與UVEPROM |
| 文件頁數(shù)： | 11/21頁 |
| 文件大小： | 631K |
| 代理商： | LC866524 |
LC86E6548
No.6747-11/21
2. Recommended Operating Range at Ta=+10
°
C to +40
°
C, VSS1=VSS2=0V
Ratings
typ.
Parameter
Symbol
Pins
Conditions
VDD[V]
min.
4.5
max.
6.0
unit
Operating
Supply voltage
Hold voltage
VDD(1)
VDD1=VDD2
=VVDD3=VDD4
VDD1=VDD2
0.98
μ
s
≤
tCYC
tCYC
≤
400
μ
s
RAMs and the
registers hold
voltage at HOLD
mode.
VHD
2.0
6.0
Pull-down
Voltage
Input high
voltage
VP
VP
4.5 to 6.0
-35
VDD
VIH(1)
Port 0 at CMOS output
Output disable
4.5 to 6.0
0.
33VDD
+1.0
VDD
13.5
VDD
VIH(2)
Port 0 at N-ch open drain
output
Port 1
Ports 72,73
Port 3 at CMOS
output
Port 3 at N-ch open
drain output
Port 70
Port input/interrupt
Port 71
RES
Port 70
Watchdog timer
Port 8
Ports
74
,75
S16 to S51
Output disable
4.5 to 6.0 0.75VDD
VIH(3)
Output disable
4.5 to 6.0 0.75VDD
VIH(4)
Output disable
Tr. OFF
Output disable
4.5 to 6.0 0.75VDD
13.5
VDD
VIH(5)
4.5 to 6.0 0.75VDD
VIH(6)
Output disable
4.5 to 6.0 0.9VDD
VDD
VIH(7)
Output disable
4.5 to 6.0 0.75VDD
VDD
VIH(8)
Output P-channel
Tr. OFF
Output disable
4.5 to 6.0
0.
33VDD
+1.0
VSS
VDD
VIL(1)
Port 0 at CMOS
output option
Port 0 at N-ch open
drain output
Ports 1,3
Ports 72,73
Port 70
Port input/interrupt
Port 71
RES
Port 70
Watchdog timer
Port 8
Ports
74
,75
S16 to S51
4.5 to 6.0
0.2VDD
VIL(2)
Output disable
4.5 to 6.0
VSS
0.25VDD
VIL(3)
Output disable
4.5 to 6.0
VSS
0.25VDD
VIL(4)
Output disable
4.5 to 6.0
VSS
0.25VDD
VIL(5)
Output disable
4.5 to 6.0
VSS
0.
8VDD
-1.0
0.25VDD
VIL(6)
Output disable
4.5 to 6.0
VSS
Input low
voltage
VIL(7)
Output P-channel
Tr. OFF
4.5 to 6.0
VP
0.2VDD
V
Operation
cycle time
tCYC
4.5 to 6.0
0.98
400
μ
s
Continue.
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