參數(shù)資料
型號(hào)： LC86P6560
廠商： Sanyo Electric Co.,Ltd.
英文描述： 8-bit Single Chip Microcontroller with 60K Byte One-Time PROM(8位單片微控制器（帶60K字節(jié)一次性可編程的PROM）)
中文描述： 8位微控制器的單芯片具有60K字節(jié)一次性可編程（8位單片微控制器（帶60,000字節(jié)一次性可編程的可編程））
文件頁(yè)數(shù)： 14/22頁(yè)
文件大?。?/td> 678K
代理商： LC86P6560
LC86P6560
14/22
Ratings
typ.
Parameter
Symbol
Pins
Conditions
VDD[V]
4.5-6.0
min.
-1
max.
unit
IOFF(1)
Output P-ch Tr. OFF
VOUT=VSS
Output P-ch Tr. OFF
VOUT=VDD-40V
Output P-ch Tr. OFF
Using as input ports
Output off-
leak current
IOFF(2)
S0/T0 to S6/T6, S32
to
S51
pull-down resistor
without
4.5-6.0
-30
μ
A
Resistance of
the low level
hold Tr.
High voltage
pull-down
resistor
VP pull-down
resistor
Hysteresis
voltage
Rinpd
S16 to S51
4.5-6.0
200
Rpd
S7/T7 to S15/T15,
S16 to S31
Output P-ch Tr. OFF
VOUT=3V
Vp=-30V
VSS=GND
Vp=-30V
Output disable
5.0
60
100
200
Rvppd
Vp
5.0
60
100
200
K
VHIS
Port 1
Ports 70,71,72,73,75
RES
All pins
4.5-6.0
0.1VDD
V
Pin
capacitance
CP
f=1MHz
Unmeasurement
terminals for the
input are set to
VSS level.
Ta=25
°
C
4.5-6.0
10
pF
4. Serial Input/Output Characteristics at Ta=-30
°
C to +70
°
C, VSS1=VSS2=0V
Ratings
typ.
Parameter
Symbol
Pins
Conditions
VDD[V]
4.5-6.0
min.
2
1
max.
unit
Cycle
Low Level
pulse width
High Level
pulse width
Cycle
Low Level
pulse width
High Level
pulse width
Data set up time
Data hold time
Output delay time
(Serial clock is
external clock)
Output delay time
(Serial clock is
internal clock)
t
CKCY
(1)
t
CKL
(1)
I
t
CKH
(1)
SCK0,
SCK1
Refer to figure 5.
1
t
CKCY
(2)
t
CKL
(2)
2
1/2
t
CKCY
1/2
t
CKCY
S
O
t
CKH
(2)
SCK0,
SCK1
Use pull-up
resistor (1k
)
when opendrain
output.
Refer to figure 5.
Data set-up to
SCK0,1
Data hold from
SCK0,1
Refer to figure 5.
Use pull-up
resistor (1k
)
when open drain
output.
Data hold from
SCK0,1
Refer to figure 5.
4.5-6.0
t
CYC
t
ICK
0.1
S
t
CKI
SI0,SI1
SB0,SB1
4.5-6.0
0.1
t
CKO(1)
7/12
t
CYC
+0.2
S
t
CKO(2)
SO0,SO1
SB0,SB1
4.5-6.0
1/3
t
CYC
+0.2
μ
s
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