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參數(shù)資料
| 型號： | LC875132A |
| 廠商： | Sanyo Electric Co.,Ltd. |
| 英文描述： | 8-Bit Single Chip Microcontroller with 32K-Byte(32512 ×8 bits) ROM and 1024-Byte(1024 ×8 bits) RAM On Chip(8位單片微控制器（帶片上32K（32512 ×8 bit）字節(jié)ROM和1024(1024 ×8 bits)字節(jié)RAM）) |
| 中文描述： | 8位單片機(jī)微控制器為32K字節(jié)（32512 × 8位）ROM和1024字節(jié)（1024 × 8位）片上的RAM（8位單片微控制器（帶片上32K的（32512 × 8位）字節(jié)光盤和1024（1024 × 8位）字節(jié)的RAM）） |
| 文件頁數(shù)： | 9/25頁 |
| 文件大?。?/td> | 785K |
| 代理商： | LC875132A |
LC875164A/48A/32A
9/25
Pin Assignment
Pin Name
VSS1
VSS2
VSS3
VDD1
VDD2
VDD3
Port 0
P00 - P07
I/O
-
Pin Function
Option
No
Negative power supply
-
Positive power supply
No
I/O
8-bit Input/output port
Data direction can be specified in nibble units
Use of pull-up resistor can be specified in nibble units
HOLD-release input
Input for port 0 interrupt
8-bit Input/output port
Data direction can be specified for each bit
Use of pull-up resistor can be specified for each bit
Other functions
P10: SIO0 data output
P11: SIO0 data input/bus input/output
P12: SIO0 clock input/output
P13: SIO1 data output
P14: SIO1 data input/bus input/output
P15: SIO1 clock input/output
P16: Timer 1 PWML output
P17: Timer 1 PWMH output/Buzzer output
8-bit Input/output port
Data direction can be specified for each bit
Use of pull-up resistor can be specified for each bit
Other functions
P20-P23: INT4 input/HOLD release input/timer 1 event input
/Timer 0L capture input/Timer 0H capture input
P24-P27: INT5 input/HOLD release input/timer 1 event input
/Timer 0L capture input /Timer 0H capture input
Interrupt receiver format
Rising
Falling
Yes
Port 1
P10 - P17
I/O
Yes
Port 2
P20 - P27
Rising/
falling
Yes
Yes
H level
L level
INT4
INT5
Yes
Yes
Yes
Yes
No
No
No
No
I/O
5-bit Input/output port
Data direction can be specified for each bit
Use of pull-up resistor can be specified for each bit
4-bit Input/output port
Data direction can be specified for each bit
Use of pull-up resistor can be specified for each bit
Other functions
P70: INT0 input/HOLD release input/Timer0L capture input
/Output for watchdog timer
P71: INT1 input/HOLD release input/Timer0H capture input
P72: INT2 input/HOLD release input/timer 0 event input
/Timer0L capture input
P73: INT3 input(noise rejection filter attached input)
/timer 0 event input/Timer0H capture input
Interrupt receiver format
Rising
Falling
Yes
Port 3
P30 - P34
I/O
Yes
Port 7
P70 - P73
Rising/
falling
No
No
Yes
Yes
H level
L level
INT0
INT1
INT2
INT3
Yes
Yes
Yes
Yes
Yes
Yes
Yes
Yes
Yes
Yes
No
No
Yes
Yes
No
No
I/O
No
(Continued)
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