參數(shù)資料
型號: LC877424A
廠商: Sanyo Electric Co.,Ltd.
英文描述: 8 Bit Single Chip Microcontroller Incorporating 48K/40K/32K/24K Byte ROM and 1536 byte RAM on Chip
中文描述: 8位單片機微控制器納入48K/40K/32K/24K字節(jié)ROM和1536字節(jié)的片上內存
文件頁數(shù): 12/22頁
文件大?。?/td> 342K
代理商: LC877424A
LC877448A/40A/32A/24A
No.7776-12/22
Electrical Characteristics
/ Ta=-30
°
C to +70
°
C, VSS1=VSS2=VSS3=0V
Parameter
Symbol
Pins
Conditions
VDD [V]
min
typ
max
unit
IIH1
Port 0, 1, 3, 7, 8
Port A, B, C, D, E, F, L
Output disabled
Pull-up resister OFF
VIN=VDD
(including OFF state
leak
current of the output Tr.)
2.5 to 6.0
1
IIH2
IIH3
RES
VIN=VDD
When configured as an
input port
VIN=VDD
2.5 to 6.0
1
XT1, XT2
2.5 to 6.0
1
IIH4
IIH5
CF1
VIN=VDD
VIN=VBIS + 0.5V
(VBIS : Bias voltage)
2.5 to 6.0
15
High level
input current
P87 / AN7 / MICIN
small signal input
2.5 to 6.0
4.2
8.5
15
IIL1
Port 0, 1, 3, 7, 8
Port A, B, C, D, E, F, L
Output disabled
Pull-up resister OFF
VIN=VSS
(including OFF state
leak current of the output
Tr.)
2.5 to 6.0
-1
IIL2
IIL3
RES
VIN=VSS
When configured as an
input port
VIN=VSS
2.5 to 6.0
-1
XT1, XT2
2.5 to 6.0
-1
IIL4
IIL5
CF1
VIN=VSS
VIN=VBIS - 0.5V
(VBIS : Bias voltage)
2.5 to 6.0
-15
Low level
input current
P87 / AN7 / MICIN
small signal input
2.5 to 6.0
-15
-8.5
-4.2
μ
A
VOH1
VOH2
VOH3
VOH4
VOH5
VOL1
VOL2
VOL3
VOL4
VOL5
VOL6
VOL7
VODLS
IOH=-1.0mA
IOH=-0.1mA
IOH=-0.4mA
IOH=-1.0mA
IOH=-0.1mA
IOL=10mA
IOL=1.6mA
IOL=30mA
IOL=1mA
IOL=0.5mA
IOL=8mA
IOL=1.4mA
IO=0mA
VLCD, 2/3VLCD,
1/3VLCD level output
Refer to figure 8
4.5 to 6.0
VDD-1
Port 0, 1, 3 : CMOS
output option
2.5 to 6.0
VDD-0.5
VDD-1
VDD-1
Port 7
2.5 to 6.0
4.5 to 6.0
High level
output voltage
Port A, B, C, D, E, F
2.5 to 6.0
VDD-0.5
4.5 to 6.0
1.5
Port 0, 1, 3
2.5 to 6.0
0.4
Port 30, 31
4.5 to 6.0
1.5
4.5 to 6.0
0.4
Port 7, 8
2.5 to 6.0
0.4
4.5 to 6.0
1.5
Low level
output voltage
Port A, B, C, D, E, F
2.5 to 6.0
0.4
S0 to S47
2.5 to 6.0
0
±0.2
LCD output voltage
regulation
VODLC
COM0 to COM3
IO=0mA
VLCD, 2/3VLCD,
1/2VLCD, 1/3VLCD
level output
Refer to figure 8
2.5 to 6.0
0
±0.2
V
RLCD1
Resistance per one bias
resistor
Refer to figure 8
2.5 to 6.0
60
LCD bias resistor
RLCD2
Resistance per one
bias resistor
1/2R mode
Refer to figure 8
2.5 to 6.0
30
4.5 to 6.0
15
40
70
Resistance of
pull-up MOS Tr.
Rpu
Port 0, 1, 3, 7
Port A, B, C, D, E, F
VOH=0.9VDD
2.5 to 4.5
25
70
150
k
VHIS1
Port 1, 7
RES
2.5 to 6.0
0.1VDD
Hysterisis voltage
VHIS2
Port 87 small signal
input
2.5 to 6.0
0.1VDD
V
Continued on next page.
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