參數(shù)資料
型號(hào): LC87F57C8A
廠商: Sanyo Electric Co.,Ltd.
英文描述: 8 BIT SINGLE CHIP MICROCONTROLLER
中文描述: 8位單片機(jī)
文件頁數(shù): 9/28頁
文件大?。?/td> 336K
代理商: LC87F57C8A
LC87F57C8A
Ver.1.00
9/27
Pin Description
Name
I/O
-
Function description
Option
No
VSS1, VSS2
VSS3
VDD1, VDD2
VDD3
Port 0
P00 - P07
Power terminal (-)
-
Power terminal (+)
No
I/O
8-bit input/output port
Data direction programmable in nibble units
Pull-up resistor provided/not provided (specified in nibble units)
HOLD release input
Port 0 interrupt input
AD converter input port : AN3 (P03)- AN7 (P07)
8-bit input/output port
Data direction programmable for each bit individually
Pull-up resistor provided/not provided (specified by bit)
Other functions
P10: SIO0 data output
P11: SIO0 data input, bus input/output
P12: SIO0 clock input/output
P13: SIO1 data output
P14: SIO1 data input, bus input/output
P15: SIO1 clock input/output
P16: Timer 1 PWML output
P17: Timer 1 PWMH output/Buzzer output
8-bit input/output port
Data direction programmable for each bit individually
Pull-up resistor provided/not provided (specified by bit)
Other functions
P20-P23: INT4 input/HOLD release input/Timer 1 event input/Timer
0L capture input/Timer 0H capture input
P24-P27: NT5 input/HOLD release input/Timer 1 event input/Timer
0L capture input/Timer 0H capture input
Interrupt detection style
Rising
Falling
Yes
Port 1
P10 - P17
I/O
Yes
Port 2
P20 - P27
Rising/
falling
enable
enable
H level
L level
INT4
INT5
enable
enable
enable
enable
disable
disable
disable
disable
I/O
4-bit input/output port
Data direction programmable for each bit individually
Pull-up resistor provided/not provided (specified by bit)
Other functions
P70: INT0 input/HOLD release input/Timer 0L capture input/Output for
watchdog timer
P71: INT1 input/HOLD release input/Timer 0H capture input
P72: INT2 input/HOLD release input/Timer 0 event input/Timer0L
capture input
P73: INT3 input with noise filter/Timer 0 event input/Timer 0H capture
input
Interrupt detection style
Rising
Falling
Yes
Port 7
P70 - P73
No
Rising/
falling
disable
disable
enable
enable
H level
L level
INT0
INT1
INT2
INT3
enable
enable
enable
enable
enable
enable
enable
enable
enable
enable
disable
disable
enable
enable
disable
disable
I/O
AD converter input port : AN8 (P70), AN9 (P71)
(Continued)
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