參數(shù)資料
型號(hào): LC8902Q
廠商: Sanyo Electric Co.,Ltd.
英文描述: Digital Audio Interface Receiver(數(shù)字音頻接口接收器)
中文描述: 數(shù)字音頻接口接收器(數(shù)字音頻接口接收器)
文件頁(yè)數(shù): 12/14頁(yè)
文件大?。?/td> 185K
代理商: LC8902Q
XMODE
The XMODE pin resets the LC8902/Q system. The LC8902/Q will start to function normally if a high level is applied to
this pin after the power supply voltage rises above a value of at least 4.5 V.
1. Once the LC8902/Q is operating, the system will be reset if a low level is applied once again to the XMODE pin.
2. This IC can be used without using the microcomputer interface by tying the CE, CL and DI microcomputer interface
input pins low and using D1 as the data input pin. This technique can be used as a simplified method for product
evaluation.
Data Output Timing
The figures show the data output timing.
1. Data is output in synchronization with the falling edge of the BCLK signal.
2. Data, BCLK and LRCK are output in synchronization with the rising edge of the 256 fs clock.
3. The data output timings for 20-bit MSB first and 16-bit MSB first output are shown in the timing charts.
Timing Chart
No. 4333-12/14
LC8902, 8902Q
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