參數(shù)資料
型號(hào): LC8903
廠商: Sanyo Electric Co.,Ltd.
英文描述: Digital Audio Interface Receiver(數(shù)字音頻接口接收器)
中文描述: 數(shù)字音頻接口接收器(數(shù)字音頻接口接收器)
文件頁(yè)數(shù): 10/15頁(yè)
文件大?。?/td> 201K
代理商: LC8903
Note: Setting the data demodulation input code to one of the XSYS settings switches the system clock from the VCO to the crystal oscillator and sets
the LC8903/Q to analog source mode. Selecting one of the input pins once again sets the LC8903/Q to digital source mode and PLL operation.
2. Data output mode setting
There are two data output modes: 16-bit MSB first and 20-bit msb first. These are selected by the bit I14 code.
3. System stop
The operation of both the VCO and the crystal oscillator can be stopped, thus stopping the whole LC8903/Q system,
by setting the bit I4 code as shown in the table.
The values of the bits I4 to I14 are all initialized to low immediately after the XMODE pin goes from low to high.
Since bits I0 to I3 and I15 are not used, their initial values are undefined.
Microprocessor Interface Output
Bits D0 to D15 in the microprocessor interface output format have the following meanings.
No. 4542-10/15
LC8903, 8903Q
I5
L
H
L
H
L
H
L
H
I6
L
L
H
H
L
L
H
H
I7
L
L
L
L
H
H
H
H
Data demodulation input
DIN1
DIN2
DIN3
DIN4
DIN5
XSYS
XSYS
XSYS
I8
L
H
L
H
L
H
L
H
I9
L
L
H
H
L
L
H
H
I10
L
L
L
L
H
H
H
H
DOUT1
DIN1
DIN2
DIN3
DIN4
DIN5
GND
GND
GND
I11
L
H
L
H
L
H
L
H
I12
L
L
H
H
L
L
H
H
I13
L
L
L
L
H
H
H
H
DOUT2
V
DIN1
DIN2
DIN3
DIN4
DIN5
GND
GND
I14
L
H
Data output mode
16-bit MSB first
20-bit MSB first
I4
L
H
System operation
System stop
Bit
Function
D0
Invalid bit. Always output as a low level.
D1
D2
Indicates the sample frequency.
Corresponds to the fs external output pin.
D3
Indicates the state of the copy flag.
High = copy enabled, low = copy protect
D4
Outputs the first bit of the channel status bits.
D5 to D12
These pins output the channel status 8-bit category codes serially.
D13 to D15
Invalid bits. Always output as low levels.
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