參數(shù)資料
型號： LD8088-2
廠商： INTEL CORP
元件分類： 微控制器/微處理器
英文描述： 8-BIT HMOS MICROPROCESSOR
中文描述： 8-BIT, 8 MHz, MICROPROCESSOR, CDIP40
封裝： CERDIP-40
文件頁數(shù)： 18/30頁
文件大?。?/td> 397K
代理商： LD8088-2
8088
A.C. CHARACTERISTICS
(Continued)
TIMING RESPONSES
Symbol
Parameter
8088
8088-2
Units
Test
Min
Max
Min
Max
Conditions
TCLAV
Address Valid Delay
10
110
10
60
ns
TCLAX
Address Hold Time
10
10
ns
TCLAZ
Address Float Delay
TCLAX
80
TCLAX
50
ns
TLHLL
ALE Width
TCLCH
b
20
TCLCH
b
10
ns
TCLLH
ALE Active Delay
80
50
ns
TCHLL
ALE Inactive Delay
85
55
ns
TLLAX
Address Hold Time to
ALE Inactive
TCHCL
b
10
TCHCL
b
10
ns
TCLDV
Data Valid Delay
10
110
10
60
ns
TCHDX
Data Hold Time
10
10
ns
TWHDX
Data Hold Time after WR
TCLCH
b
30
TCLCH
b
30
ns
TCVCTV
Control Active Delay 1
10
110
10
70
ns
TCHCTV
Control Active Delay 2
10
110
10
60
ns
TCVCTX
Control Inactive Delay
10
110
10
70
ns
TAZRL
Address Float to READ
Active
0
0
ns
TCLRL
RD Active Delay
10
165
10
100
ns
TCLRH
RD Inactive Delay
10
150
10
80
ns
TRHAV
RD Inactive to Next
Address Active
TCLCL
b
45
TCLCL
b
40
ns
TCLHAV
HLDA Valid Delay
10
160
10
100
ns
TRLRH
RD Width
2TCLCL
b
75
2TCLCL
b
50
ns
TWLWH
WR Width
2TCLCL
b
60
2TCLCL
b
40
ns
TAVAL
Address Valid to ALE Low
TCLCH
b
60
TCLCH
b
40
ns
TOLOH
Output Rise Time
20
20
ns
From 0.8V to 2.0V
TOHOL
Output Fall Time
12
12
ns
From 2.0V to 0.8V
NOTES:
1. Signal at 8284A shown for reference only. See 8284A data sheet for the most recent specifications.
2. Set up requirement for asynchronous signal only to guarantee recognition at next CLK.
3. Applies only to T2 state (8 ns into T3 state).
18
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