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參數(shù)資料
| 型號： | LE57D111JC |
| 英文描述： | Telecommunication IC |
| 中文描述： | 通信集成電路 |
| 文件頁數(shù)： | 6/22頁 |
| 文件大小： | 546K |
| 代理商： | LE57D111JC |
P R E L I M I N A R Y
6
Le57D11 Data Sheet
PIN DESCRIPTIONS
Pin Name
Type
Description
A
1
(TIP)
A
2
(TIP)
AGND
Input/Output
Output of A (TIP) power amplifier of channel 1.
Input/Output
Output of A (TIP) power amplifier of channel 2.
Ground
Analog and digital ground.
B
1
(RING)
B
2
(RING)
BGND
1
BGND
2
C1
1
C2
1
C1
2
C2
2
CAS
Input/Output
Output of B (RING) power amplifier of channel 1.
Input/Output
Output of B (RING) power amplifier of channel 2.
Ground
Battery (power) ground of channel 1
Ground
Battery (power) ground of channel 2.
Input
State decoder inputs of channel 1.
Input
Input
State decoder inputs of channel 2.
Input
Capacitor
Pin for capacitor to filter reference voltage when operating in anti-saturation region.
CDC
1
CDC
2
Capacitor
DC feed filter capacitor and DC feed programming pin of channel 1.
Capacitor
DC feed filter capacitor and DC feed programming pin of channel 2.
CFLT
1
Input/Output
Fault detector output of channel 1. Connect a capacitor from CFLT
1
to AGND to set fault
detector timing.
CFLT
2
Input/Output
Fault detector output of channel 2. Connect a capacitor from CFLT
2
to AGND to set fault
detector timing.
DAC
Input
Ring-trip negative of both channels. Negative input to ring-trip comparator.
DB
1
DB
2
Input
Ring-trip positive of channel 1. Positive input to ring-trip comparator.
Input
Ring-trip positive of channel 2. Positive input to ring-trip comparator.
DET
1
Output
Switch-hook/Ring-trip detector output of channel1. Logic low indicates that a detector is
tripped.
DET
2
Output
Switch-hook/Ring-trip detector output of channel 2. Logic low indicates that a detector is
tripped.
HP
1
HP
2
Capacitor
Connect High-pass filter capacitor from HP
1
to B
1
(RING).
Connect High-pass filter capacitor from HP
2
to B
2
(RING).
Connection for reference resistor that programs loop detector threshold and DC feed
current of both channels.
Capacitor
IREF
Resistor
RSN
1
Input
Receive Summing Node of channel 1. The metallic current (both AC and DC) between A
1
(TIP) and B
1
(RING) is equal to 500 times the current into this pin. The networks that
program receive gain and two-wire impedance of channel 1 connect to this node.
RSN
2
Input
Receive Summing Node of channel 2. The metallic current (both AC and DC) between A
2
(TIP) and B
2
(RING) is equal to 500 times the current into this pin. The networks that
program receive gain and two-wire impedance of channel 2 connect to this node.
TMG
1
Output
Thermal management of channel 1. External resistor connects from TMG
1
to VBAT to
offload power from the SLIC device.
TMG
2
Output
Thermal management of channel 2. External resistor connects from TMG2 to VBAT to
offload power from the SLIC device.
VBAT
Battery
Battery supply and connection to substrate.
VCC
Power
+5 V power supply.
VTX
1
Output
Transmit audio signal of channel 1. This output is a scaled version of the A and B metallic
voltage. VTX also sources the two-wire input impedance programming network.
VTX
2
Output
Transmit audio signal of channel 2. This output is a scaled version of the A and B metallic
voltage. VTX
2
also sources the two-wire input impedance programming network.
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