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參數(shù)資料
| 型號(hào)： | LF13331N |
| 英文描述： | IC-ANALOGUE SWITCH |
| 中文描述： | 集成電路模擬廣播 |
| 文件頁(yè)數(shù)： | 2/14頁(yè) |
| 文件大?。?/td> | 265K |
| 代理商： | LF13331N |
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Absolute Maximum Ratings
If Military/Aerospace specified devices are required,
please contact the National Semiconductor Sales
Office/Distributors for availability and specifications.
(Note 1)
Supply Voltage (V
CC
b
V
EE
)
Reference Voltage
36V
V
EE
s
V
R
s
V
CC
Logic Input Voltage
V
R
b
4.0V
s
V
IN
s
V
R
a
6.0V
V
EE
s
V
A
s
V
CC
a
6V;
V
A
s
V
EE
a
36V
Analog Voltage
Analog Current
l
I
A
l
k
20 mA
Power Dissipation (Note 2)
Molded DIP (N Suffix)
Cavity DIP (D Suffix)
500 mW
900 mW
Operating Temperature Range
LF11201, 2 and LF11331, 2, 3
LF13201, 2 and LF13331, 2, 3
b
55
§
C to
a
125
§
C
0
§
C to
a
70
§
C
b
65
§
C to
a
150
§
C
Storage Temperature
Soldering Information
N and D Package (10 sec.)
SO Package
Vapor Phase (60 sec.)
Infrared (15 sec.)
300
§
C
215
§
C
220
§
C
Electrical Characteristics
(Note 3)
LF11331/2/3
LF11201/2
LF13331/2/3
LF13201/2
Symbol
Parameter
Conditions
Units
Min Typ Max Min Typ Max
R
ON
‘‘ON’’ Resistance
V
A
e
0, I
D
e
1 mA
T
A
e
25
§
C
150 200
200 300
5
150 250
200 350
10
X
X
X
V
nA
nA
R
ON
Match ‘‘ON’’ Resistance Matching
V
A
Analog Range
I
S(ON)
a
Leakage Current in ‘‘ON’’ Condition
I
D(ON)
I
S(OFF)
Source Current in ‘‘OFF’’ Condition
T
A
e
25
§
C
20
50
g
10
g
11
g
10
g
11
Switch ‘‘ON,’’ V
S
e
V
D
e
g
10V
T
A
e
25
§
C
0.3
3
5
0.3
3
10
30
100
Switch ‘‘OFF,’’ V
S
ea
10V,
V
D
eb
10V
Switch ‘‘OFF,’’ V
S
ea
10V,
V
D
eb
10V
T
A
e
25
§
C
0.4
3
0.1
3
5
0.4
3
0.1
3
10
30
10
30
nA
nA
nA
nA
100
5
100
I
D(OFF)
Drain Current in ‘‘OFF’’ Condition
T
A
e
25
§
C
V
INH
V
INL
I
INH
Logical ‘‘1’’ Input Voltage
Logical ‘‘0’’ Input Voltage
Logical ‘‘1’’ Input Current
2.0
2.0
V
V
0.8
10
25
0.1
1
0.8
40
100
0.1
1
V
IN
e
5V
T
A
e
25
§
C
3.6
3.6
m
A
m
A
m
A
m
A
I
INL
Logical ‘‘0’’ Input Current
V
IN
e
0.8
T
A
e
25
§
C
t
ON
t
OFF
t
ON
b
t
OFF
Break-Before-Make
C
S(OFF)
Source Capacitance
C
D(OFF)
Drain Capacitance
C
S(ON)
a
Active Source and Drain Capacitance Switch ‘‘ON,’’ V
S
e
V
D
e
0V
C
D(ON)
I
SO(OFF)
‘‘OFF’’ Isolation
CT
Crosstalk
SR
Analog Slew Rate
I
DIS
Disable Current
Delay Time ‘‘ON’’
Delay Time ‘‘OFF’’
V
S
e
g
10V,(Figure 3)
V
S
e
g
10V,(Figure 3)
V
S
e
g
10V,(Figure 3)
Switch ‘‘OFF,’’ V
S
e
g
10V
Switch ‘‘OFF,’’ V
D
e
g
10V
T
A
e
25
§
C
T
A
e
25
§
C
T
A
e
25
§
C
T
A
e
25
§
C
T
A
e
25
§
C
T
A
e
25
§
C
500
90
80
4.0
3.0
5.0
500
90
80
4.0
3.0
5.0
ns
ns
ns
pF
pF
pF
(Figure 4), (Note 4)
(Figure 4), (Note 4)
(Note 5)
(Figure 5), (Note 6)
T
A
e
25
§
C
T
A
e
25
§
C
T
A
e
25
§
C
T
A
e
25
§
C
b
50
b
65
50
0.4
0.6
b
50
b
65
50
0.6
0.9
dB
dB
V/
m
s
mA
mA
1.0
1.5
1.5
2.3
I
EE
Negative Supply Current
All Switches ‘‘OFF,’’ V
S
e
g
10V T
A
e
25
§
C
3.0
4.2
2.0
2.8
4.5
6.3
5.0
7.5
4.0
6.0
6.0
9.0
4.3
6.0 10.5 mA
2.7
5.0
3.8
7.5
7.0
9.0
9.8 13.5 mA
7.0
mA
I
R
Reference Supply Current
All Switches ‘‘OFF,’’ V
S
e
g
10V T
A
e
25
§
C
mA
mA
mA
I
CC
Positive Supply Current
All Switches ‘‘OFF,’’ V
S
e
g
10V T
A
e
25
§
C
Note 1:
Refer to RETSF11201X, RETSF11331X, RETSF11332X and RETSF11333X for military specifications.
Note 2:
For operating at high temperature the molded DIP products must be derated based on a
a
100
§
C maximum junction temperature and a thermal resistance
of
a
150
§
C/W, devices in the cavity DIP are based on a
a
150
§
C maximum junction temperature and are derated at
g
100
§
C/W.
Note 3:
Unless otherwise specified, V
CC
ea
15V, V
EE
eb
15V, V
R
e
0V, and limits apply for
b
55
§
C
s
T
A
s
a
125
§
C for the LF11331/2/3 and the LF11201/2,
b
25
§
C
s
T
A
s
a
85
§
C for the LF13331/2/3 and the LF13201/2.
Note 4:
These parameters are limited by the pin to pin capacitance of the package.
Note 5:
This is the analog signal slew rate above which the signal is distorted as a result of finite internal slew rates.
Note 6:
All switches in the device are turned ‘‘OFF’’ by saturating a transistor at the disable node as shown inFigure 5. The delay time will be approximately equal
to the t
ON
or t
OFF
plus the delay introduced by the external transistor.
Note 7:
This graph indicates the analog current at which 1% of the analog current is lost when the drain is positive with respect to the source.
Note 8:
i
JA
(Typical) Thermal Resistance
Molded DIP (N)
85
§
C/W
Cavity DIP (D)
100
§
C/W
Small Outline (M)
105
§
C/W
2
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PDF描述 |
|---|---|
| LF13333M | IC-SM-QUAD ANALOGUE SWITCH |
| LF13333N | IC-QUAD ANALOGUE SWITCH |
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| LF347AD | Voltage-Feedback Operational Amplifier |
| LF347AN | Voltage-Feedback Operational Amplifier |
相關(guān)代理商/技術(shù)參數(shù) |
參數(shù)描述 |
|---|---|
| LF13331N/A+ | 制造商:未知廠(chǎng)家 制造商全稱(chēng):未知廠(chǎng)家 功能描述:SPST Analog Switch |
| LF13331N/B+ | 制造商:未知廠(chǎng)家 制造商全稱(chēng):未知廠(chǎng)家 功能描述:SPST Analog Switch |
| LF13332 | 制造商:NSC 制造商全稱(chēng):National Semiconductor 功能描述:Quad SPST JFET Analog Switches |
| LF13332D | 制造商:NSC 制造商全稱(chēng):National Semiconductor 功能描述:Quad SPST JFET Analog Switches |
| LF13332M | 制造商:Rochester Electronics LLC 功能描述:- Bulk |
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