- 您現(xiàn)在的位置：買賣IC網(wǎng) > PDF目錄43916 > LF13508MX (NATIONAL SEMICONDUCTOR CORP) 8-CHANNEL, SGL ENDED MULTIPLEXER, PDSO16 PDF資料下載
參數(shù)資料
| 型號： | LF13508MX |
| 廠商： | NATIONAL SEMICONDUCTOR CORP |
| 元件分類： | 多路復(fù)用及模擬開關(guān) |
| 英文描述： | 8-CHANNEL, SGL ENDED MULTIPLEXER, PDSO16 |
| 封裝： | 0.150 INCH, PLASTIC, SOP-16 |
| 文件頁數(shù)： | 15/16頁 |
| 文件大?。?/td> | 334K |
| 代理商： | LF13508MX |
Typical Applications (Continued)
B SPEED CONSIDERATIONS
In the system of
Figure 5 with the SH omitted if n-bit accu-
racy is desired the change of the analog input voltage
should be less than g12 LSB over the AD conversion
time TC In other words the analog input slew rate (rate of
change of input voltage) will cause a slew-induced error
and its magnitude with respect to the total system error will
depend on the particular application
D
VIN
D
t
max
k
g
12 LSB
TC
e
VFS
2n c TC
where VFS is the full scale voltage of the AD Note that
slew induced errors are not affected by the MUX switch time
since we can let the unit settle before starting conversion
Example Let TC e 40 ms (MM4357) VFS e 10V and n
e
8
D
VIN
D
t
max
k
1mV
m
s
which is a very small number A 10 Vp-p sine wave of a
frequency greater than 32 Hz will have higher slew rate
than this The maximum throughput rate of the above 8-
channel system would be calculated using both the AD
conversion time and the sum of MUX switch ‘‘ON’’ time
and settling time ie
Th R
max
e
1
8(TC a TMUX)
e
3k samplessec
channel
TMUX e TON a TS(ON)
Also notice that Nyquist sampling criteria would allow
each channel to have a signal bandwidth of 15 kHz max
while the slew limit dictates a maximum frequency of 32
Hz If the input signal has a peak-to-peak voltage less
than 10V the allowable maximum input frequency can be
calculated by
fMAX e
(Slew Rate)max
q Vp-p
On the other hand if the input voltage is not band-limited a
low pass filter with an attenuation of 30 dB or better at 15
kHz should be connected in front of the MUX
1 Improving System Speed with a Sample and Hold
The system speed can be improved by using the
SH shown in
Figure 5 This allows a much greater
rate of change of VIN
D
VIN
D
t
max
k
VFS
2n c TA
where TA is the aperture time of the SH This repre-
sents an input slew rate improvement by a factor TC
TA Here again the slew rate error is not affected by
the acquisition time of the Sample and Hold since con-
version will start after the SH has settled
An impor-
tant thing to notice is that the sample and hold errors
will add to the total system error budget therefore the
inequality of the DVIN Dt expression should become
more stringent
Example TC e 40 ms TA e 05 ms n e 8 TC TA e 80
So the use of a SH allows a speed improvement by
nearly two orders of magnitude
The maximum throughput rate can be calculated by
Th R
max
e
1
8(TA a Taq a TC)
Notice that TMUX does not affect the DVIN Dt expression
nor the throughput rate of the system since it may be
switched and settled while the Sample and Hold is in the
Hold mode This is true provided that TMUX k TA a TC
C SYSTEM EXAMPLE
(Figure 7)
The LF398 SH with a 1000 pF hold capacitor has an ac-
quisition time of 4 ms to 01% (14 LSB error for 8 bits) and
an aperture time of less than 200 ms On the other hand
after the hold command the output will settle to g005 mV
in 1 ms This together with the acquisition time introduces
approximately a g14 LSB error Allowing another 14 LSB
error for hold step and gain non-linearity the maximum slew
error (DVIN Dt) should not exceed 14 LSB or
D
VIN
D
t
s
1
4
c
1
256
c
1
TA
5mV ms
(which is the maximum slew rate ofa5V peak sine wave
Also notice that due to the above input slew restrictions
the analog delay caused by the finite BW of the SH and the
digital delay caused by the response time of the controller
will be negligible The maximum throughput rate of the sys-
tem is
Th R
max
e
1
8(5 a 40)10b6
e
2800 samplessecch
If the system speed requirements are relaxed but the AD
converter is still too slow then an inexpensive SH can be
built by using just a capacitor and a low cost FET input op
amp as shown in
Figure 8
8
相關(guān)PDF資料 |
PDF描述 |
|---|---|
| LF13509MX | 4-CHANNEL, DIFFERENTIAL MULTIPLEXER, PDSO16 |
| LFC100S | 1-OUTPUT 75 W DC-DC REG PWR SUPPLY MODULE |
| LFC12D | 2-OUTPUT 75 W DC-DC REG PWR SUPPLY MODULE |
| LFC28D | 2-OUTPUT 75 W DC-DC REG PWR SUPPLY MODULE |
| LMC48S | 1-OUTPUT 75 W DC-DC REG PWR SUPPLY MODULE |
相關(guān)代理商/技術(shù)參數(shù) |
參數(shù)描述 |
|---|---|
| LF13508N | 制造商:NSC 制造商全稱:National Semiconductor 功能描述:8-Channel Analog Multiplexer |
| LF13508N/B+ | 制造商:未知廠家 制造商全稱:未知廠家 功能描述:8-Channel Analog Multiplexer |
| LF13509 | 制造商:NSC 制造商全稱:National Semiconductor 功能描述:8-Channel Analog Multiplexer |
| LF13509D | 制造商:Rochester Electronics LLC 功能描述:- Bulk |
| LF13509M | 制造商:NSC 制造商全稱:National Semiconductor 功能描述:8-Channel Analog Multiplexer |
發(fā)布緊急采購，3分鐘左右您將得到回復(fù)。