參數(shù)資料
型號: LFEC33E-4FN484I
廠商: Lattice Semiconductor Corporation
文件頁數(shù): 130/163頁
文件大?。?/td> 0K
描述: IC FPGA 32.8KLUTS 484FPBGA
標(biāo)準(zhǔn)包裝: 60
系列: EC
邏輯元件/單元數(shù): 32800
RAM 位總計(jì): 434176
輸入/輸出數(shù): 360
電源電壓: 1.14 V ~ 1.26 V
安裝類型: 表面貼裝
工作溫度: -40°C ~ 100°C
封裝/外殼: 484-BBGA
供應(yīng)商設(shè)備封裝: 484-FPBGA(23x23)
4-3
Pinout Information
LatticeECP/EC Family Data Sheet
PICs and DDR Data (DQ) Pins Associated with the DDR Strobe (DQS) Pin
PICs Associated
with DQS Strobe
PIO Within PIC
DDR Strobe (DQS) and
Data (DQ) Pins
P[Edge] [n-4]
ADQ
BDQ
P[Edge] [n-3]
ADQ
BDQ
P[Edge] [n-2]
ADQ
BDQ
P[Edge] [n-1]
ADQ
BDQ
P[Edge] [n]
A[Edge]DQSn
BDQ
P[Edge] [n+1]
ADQ
BDQ
P[Edge] [n+2]
ADQ
BDQ
P[Edge] [n+3]
ADQ
BDQ
Notes:
1. “n” is a Row/Column PIC number
2. The DDR interface is designed for memories that support one DQS strobe per eight bits of
data. In some packages, all the potential DDR data (DQ) pins may not be available.
3. PIC numbering definitions are provided in the “Signal Names” column of the Signal Descrip-
tions table.
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LFEC33E-5FN484C IC FPGA 32.8KLUTS 484FPBGA
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