Figure 2-14. DCS Waveforms sysMEM Memory The LatticeECP/EC devices contain a number of sysMEM" />
參數(shù)資料
型號: LFEC6E-3F256I
廠商: Lattice Semiconductor Corporation
文件頁數(shù): 57/163頁
文件大?。?/td> 0K
描述: IC FPGA 6.1KLUTS 195I/O 256-BGA
標(biāo)準(zhǔn)包裝: 90
系列: EC
邏輯元件/單元數(shù): 6100
RAM 位總計(jì): 94208
輸入/輸出數(shù): 195
電源電壓: 1.14 V ~ 1.26 V
安裝類型: 表面貼裝
工作溫度: -40°C ~ 100°C
封裝/外殼: 256-BGA
供應(yīng)商設(shè)備封裝: 256-FPBGA(17x17)
2-12
Architecture
LatticeECP/EC Family Data Sheet
Figure 2-14. DCS Waveforms
sysMEM Memory
The LatticeECP/EC devices contain a number of sysMEM Embedded Block RAM (EBR). The EBR consists of a 9-
Kbit RAM, with dedicated input and output registers.
sysMEM Memory Block
The sysMEM block can implement single port, dual port or pseudo dual port memories. Each block can be used in
a variety of depths and widths as shown in Table 2-6.
Table 2-6. sysMEM Block Configurations
Bus Size Matching
All of the multi-port memory modes support different widths on each of the ports. The RAM bits are mapped LSB
word 0 to MSB word 0, LSB word 1 to MSB word 1 and so on. Although the word size and number of words for
each port varies, this mapping scheme applies to each port.
RAM Initialization and ROM Operation
If desired, the contents of the RAM can be pre-loaded during device configuration. By preloading the RAM block
during the chip configuration cycle and disabling the write controls, the sysMEM block can also be utilized as a
ROM.
Memory Mode
Configurations
Single Port
8,192 x 1
4,096 x 2
2,048 x 4
1,024 x 9
512 x 18
256 x 36
True Dual Port
8,192 x 1
4,096 x 2
2,048 x 4
1,024 x 9
512 x 18
Pseudo Dual Port
8,192 x 1
4,096 x 2
2,048 x 4
1,024 x 9
512 x 18
256 x 36
CLK0
SEL
DCSOUT
CLK1
相關(guān)PDF資料
PDF描述
ACM40DTKD-S288 CONN EDGECARD EXTEND 80POS 0.156
ESM43DSAI CONN EDGECARD 86POS R/A .156 SLD
EMM36DSAI CONN EDGECARD 72POS R/A .156 SLD
ASM28DSAN CONN EDGECARD 56POS R/A .156 SLD
ASM28DSAH CONN EDGECARD 56POS R/A .156 SLD
相關(guān)代理商/技術(shù)參數(shù)
參數(shù)描述
LFEC6E-3F484C 功能描述:FPGA - 現(xiàn)場可編程門陣列 6.1 LUT 224 I/O RoHS:否 制造商:Altera Corporation 系列:Cyclone V E 柵極數(shù)量: 邏輯塊數(shù)量:943 內(nèi)嵌式塊RAM - EBR:1956 kbit 輸入/輸出端數(shù)量:128 最大工作頻率:800 MHz 工作電源電壓:1.1 V 最大工作溫度:+ 70 C 安裝風(fēng)格:SMD/SMT 封裝 / 箱體:FBGA-256
LFEC6E-3F484I 功能描述:FPGA - 現(xiàn)場可編程門陣列 6.1 LUT 224 I/O RoHS:否 制造商:Altera Corporation 系列:Cyclone V E 柵極數(shù)量: 邏輯塊數(shù)量:943 內(nèi)嵌式塊RAM - EBR:1956 kbit 輸入/輸出端數(shù)量:128 最大工作頻率:800 MHz 工作電源電壓:1.1 V 最大工作溫度:+ 70 C 安裝風(fēng)格:SMD/SMT 封裝 / 箱體:FBGA-256
LFEC6E-3F672C 制造商:LATTICE 制造商全稱:Lattice Semiconductor 功能描述:LatticeECP/EC Family Data Sheet
LFEC6E-3F672I 制造商:LATTICE 制造商全稱:Lattice Semiconductor 功能描述:LatticeECP/EC Family Data Sheet
LFEC6E-3F900C 制造商:LATTICE 制造商全稱:Lattice Semiconductor 功能描述:LatticeECP/EC Family Data Sheet