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參數(shù)資料
| 型號： | LH1782-2RD7 |
| 廠商： | POWER-ONE INC |
| 元件分類： | 電源模塊 |
| 英文描述： | 1-OUTPUT AC-DC REG PWR SUPPLY MODULE |
| 封裝： | ROHS COMPLIANT PACKAGE-32/11 |
| 文件頁數(shù)： | 10/21頁 |
| 文件大小： | 984K |
| 代理商： | LH1782-2RD7 |
H Series Data Sheet
70 Watt AC-DC Converters
BCD20019 Rev AA
Page 18 of 21
www.power-one.com
V output (V2, V3):
Connector pin V is internally connected to the open collector of
a NPN transistor. The emitter is connected to the negative
potential of output 1. VV – 0.6 V (logic low) corresponds to a
monitored voltage level (Vi and/or Vo1) < Ut. The current IV
through the open collector should not exceed 50 mA. The NPN
output is not protected against external overvoltages. VV
should not exceed 60 V.
Table 17: Undervoltage monitor functions
V output
Monitoring
Minimum adjustment range
Typical hysteresis Vh [% of Vt ]
(VME compatible)
of threshold level Vt
for Vt min – Vt max
V i
Vo1
Vti
V to
Vhi
V ho
V2
yes
no
Vi min – Vi max 1–
3.0 – 0.5
-
V3
yes
Vi min – Vi max 1
0.95 – 0.98 Vo1 2
3.0 – 0.5
"0"
1 Threshold level adjustable by potentiometer (not recommended for mobile applications).
2 Fixed value between 95% and 98% of Vo1 (tracking), output undervoltage monitoring is not a requirement of VME standard.
Fig. 22
Output configuration of options V2 and V3
capacitance. Consequently, the working input voltage and the
threshold level Vti should be adequately above the minimum
input voltage Vi min of the converter, so that enough energy is
remaining in the input capacitance.
Formula for threshold level for desired value of t h:
2 Po (th + 0.3 ms) 100
Vti =
––––––––––––––––––––– + Vi min2
Ci min
η
where as:
Ci min = minimum internal input capacitance [mF],
according to the table below
Ci ext = external input capacitance [mF]
Po
= output power [W]
η
= efficiency [%]
t h
= hold-up time [ms]
Vi min = minimum input voltage [V]
Vti
= threshold level [V]
Note:
The threshold level Vti of option V2 and V3 is adjusted in
the factory to a value according to table 17.
Vi , Vo1 status
V output, VV
Vi or Vo1 < Vt
low, L, VV - 0.6 V at IV = 50 mA
Vi and Vo1 > Vt + Vh
high, H, IV - 25 A at VV = 5.1 V
Vo1+
Vo1–
V
VV
IV
Rp
Input
11009a
Option V operates independently of the built-in input under-
voltage lockout circuit. A logic "low" signal is generated at pin 5
as soon as one of the monitored voltages drops below the pre-
selected threshold level Vt. The return for this signal is Vo1–
(pin 23). The V output recovers, when the monitored voltage
exceeds Vt + Vh. The threshold level Vt is either adjustable by a
potentiometer, accessible through a hole in the front cover, or
adjusted in the factory to a determined customer-specific
value.
Versions V2 and V3 are available as shown below.
Table 16: Available internal input capacitance and factory
potentiometer setting of Vt i with resulting hold-up time
Type
LH
Unit
Ci min
0.14
mF
Vt i
85
VDC
th
5ms
Fig. 23
Definition of Vti,
Vti and Vhi
Vti
Vhi
VV low
VV
VV high
Vi
P
o
=
P
onom
P
o
=0
P
o
=0
Vti
P
o
=
P
onom
11023a
Threshold tolerances and hysteresis:
Vi is monitored after the input filter and rectifier. Consequently,
this voltage differs from the voltage at the connector pins by the
voltage drop
Vt i across input filter and rectifier. The threshold
level of option V0 is factory-adjusted at Io nom and TA = 25 °C.
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