參數(shù)資料
型號： LH28F640BFHG-PBTLZ7
廠商： Sharp Corporation
英文描述： 64M (x16) Flash Memory
中文描述： 6400（x16）的快閃記憶體
文件頁數(shù)： 27/36頁
文件大小： 557K
代理商： LH28F640BFHG-PBTLZ7
LHF64FD5 25
Rev. 2.44
1.2.5 AC Characteristics - Write Operations
(1), (2)
NOTES:
1. The timing characteristics for reading the status register during block erase, full chip erase, (page buffer) program and
OTP program operations are the same as during read-only operations. Refer to AC Characteristics for read-only
operations.
2. A write operation can be initiated and terminated with either CE# or WE#.
3. Sampled, not 100% tested.
4. Write pulse width (t
WP
) is defined from the falling edge of CE# or WE# (whichever goes low last) to the rising edge of
CE# or WE# (whichever goes high first). Hence, t
WP
=t
WLWH
=t
ELEH
=t
WLEH
=t
ELWH
.
5. Write pulse width high (t
WPH
) is defined from the rising edge of CE# or WE# (whichever goes high first) to the falling
edge of CE# or WE# (whichever goes low last). Hence, t
WPH
=t
WHWL
=t
EHEL
=t
WHEL
=t
EHWL
.
6. V
PP
should be held at V
PP
=V
PPH1/2
until determination of block erase, full chip erase, (page buffer) program or OTP
program success (SR.1/3/4/5=0).
7. t
WHR0
(t
EHR0
) after the Read Query or Read Identifier Codes/OTP command=t
AVQV
+100ns.
8. Refer to Table 6 for valid address and data for block erase, full chip erase, (page buffer) program, OTP program or lock bit
configuration.
V
CC
=2.7V-3.6V, T
A
=-40
°
C to +85
°
C
Symbol
Parameter
Notes
Min.
Max.
Unit
t
AVAV
t
PHWL
(t
PHEL
)
t
ELWL
(t
WLEL
)
t
WLWH
(t
ELEH
)
t
DVWH
(t
DVEH
)
t
AVWH
(t
AVEH
)
t
WHEH
(t
EHWH
)
t
WHDX
(t
EHDX
)
t
WHAX
(t
EHAX
)
t
WHWL
(t
EHEL
)
t
SHWH
(t
SHEH
)
t
VVWH
(t
VVEH
)
t
WHGL
(t
EHGL
)
t
QVSL
t
QVVL
Write Cycle Time
80
ns
RST# High Recovery to WE# (
CE#
) Going Low
3
150
ns
CE# (WE#) Setup to WE# (CE#) Going Low
0
ns
WE# (CE#) Pulse Width
4
50
ns
Data Setup to WE# (CE#) Going High
8
40
ns
Address Setup to WE# (CE#) Going High
8
50
ns
CE# (WE#) Hold from WE# (CE#) High
0
ns
Data Hold from WE# (CE#) High
0
ns
Address Hold from WE# (CE#) High
0
ns
WE# (CE#) Pulse Width High
5
30
ns
WP# High Setup to WE# (CE#) Going High
3
0
ns
V
PP
Setup to WE# (CE#) Going High
3
200
ns
Write Recovery before Read
30
ns
WP# High Hold from Valid SRD
3, 6
0
ns
V
PP
Hold from Valid SRD
3, 6
0
ns
t
WHR0
(t
EHR0
)
WE# (CE#) High to SR.7 Going "0"
3, 7
t
AVQV
+
50
ns
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