參數(shù)資料
型號: LH530800A
廠商: Sharp Corporation
英文描述: CMOS 1M (128K x 8) MROM
中文描述: 100萬的CMOS(128K的× 8)MROM
文件頁數(shù): 1/6頁
文件大?。?/td> 61K
代理商: LH530800A
LH530800A
CMOS 1M (128K
×
8) MROM
FEATURES
131,072 words
×
8 bit organization
Access time: 150 ns (MAX.)
Power consumption:
Operating: 192.5 mW (MAX.)
Standby: 550
μ
W (MAX.)
Static operation
TTL compatible I/O
Three-state outputs
Single +5 V power supply
Packages:
32-pin, 600-mil DIP
32-pin, 525-mil SOP
32-pin, 450-mil QFJ (PLCC)
JEDEC standard EPROM pinout (DIP)
DESCRIPTION
The LH530800A is a mask-programmable ROM
organized as 131,072
×
8 bits (1,048,576 bits). It is fab-
ricated using silicon-gate CMOS process technology.
PIN CONNECTIONS
530800A-1
TOP VIEW
1
2
3
4
5
6
9
10
A
2
A
1
A
5
A
4
Vcc
28
27
26
25
24
23
20
17
A
7
A
6
7
8
A
3
22
21
A
15
A
12
GND
A
13
A
8
A
9
A
11
A
10
CE
D
7
D
6
D
5
D
4
D
3
11
12
13
32
31
30
29
NC
A
16
A
14
NC
14
15
16
19
18
D
1
D
2
A
0
D
0
OE/OE
NC
32-PIN DIP
32-PIN SOP
Figure 1. Pin Connections for DIP and
SOP Packages
5
6
7
8
9
10
11
12
A
7
A
6
A
5
A
4
A
3
A
2
A
1
A
0
D
0
29
28
27
26
25
24
A
14
A
13
A
8
A
9
A
11
OE/OE
A
10
CE
21
14 15 16
20
19
18
17
13
22
D
7
23
D
1
1
2
3
4
32 31 30
A
1
A
1
A
1
N
V
C
N
N
32-PIN QFJ
TOP VIEW
530800A-7
D
2
G
D
3
D
4
D
5
D
6
Figure 2. Pin Connections for QFJ
(PLCC) Package
1
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