參數(shù)資料
型號: LH5496HU-35
廠商: Sharp Corporation
英文描述: CMOS 512 X 9 FIFO
中文描述: 512 × 9的CMOS先進(jìn)先出
文件頁數(shù): 7/16頁
文件大?。?/td> 141K
代理商: LH5496HU-35
TIMING DIAGRAMS
t
RS
EFL
t
RSR
t
RRSS
t
t
WRSS
FFH
t
HFH
t
RS
R,W
EF
FF,HF
5496-14
NOTES:
1. t
RSC
= t
RS
+ t
RSR
.
2. W and R
V
IH
around the rising edge of RS.
3. The Data Out pins (D
0
- D
8
) are forced into a
high-impedance state whenever EF = LOW.
t
RSC
Figure 5. Reset Timing
W
t
WPW
t
RLZ
t
A
t
WC
t
A
t
RPW
t
DV
t
RHZ
VALID DATA OUT
t
RR
R
t
RC
t
WR
t
DH
t
DS
5496-5
Q
0
- Q
8
D
0
- D
8
VALID DATA OUT
VALID DATA IN
VALID DATA IN
Figure 6. Asynchronous Write and Read Operation
CMOS 512
×
9 FIFO
LH5496/96H
7
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