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參數(shù)資料
| 型號： | LK1001-7PD4TB2 |
| 元件分類： | 電源模塊 |
| 英文描述： | 1-OUTPUT 150 W AC-DC REG PWR SUPPLY MODULE |
| 封裝： | METAL, CASE K02, MODULE |
| 文件頁數(shù)： | 15/26頁 |
| 文件大?。?/td> | 601K |
| 代理商： | LK1001-7PD4TB2 |
Cassette Style
150 Watt AC-DC Converters
K Series
Edition 01/01.2001
22/26
Vo1+
Vo1–
D
UD
ID
Rp
Input
11007
NPN output (D5...DD):
Connector pin D is internally connected via the collector-
emitter path of a NPN transistor to the negative potential of
output 1.
UD
< 0.4 V (logic low) corresponds to a monitored
voltage level (
Ui and/or Uo1)
> U
t + Uh. The current ID
through the open collector should not exceed 20 mA. The
NPN output is not protected against external overvoltages.
UD should not exceed 40 V.
Ui, Uo1 status
D output,
UD
Ui or Uo1 < Ut
high, H,
ID ≤ 25 A at UD = 40 V
Ui and Uo1 > Ut + Uh
low, L,
UD ≤ 0.4 V at ID = 20 mA
Vo1+
Vo1–
D
UD
I
Rp
Input
11006
Fig. 33
Option D0...D4: JFET output, ID
≤ 2.5 mA
JFET output (D0…D4):
Connector pin D is internally connected via the drain-
source path of a JFET (self-conducting type) to the negative
potential of output 1.
UD
≤ 0.4 V (logic low) corresponds to a
monitored voltage level (
Ui and/or Uo1)
<U
t. The current ID
through the JFET should not exceed 2.5 mA. The JFET is
protected by a 0.5 W Zener diode of 8.2 V against external
overvoltages.
Ui, Uo1 status
D output,
UD
Ui or Uo1 < Ut
low, L,
UD ≤ 0.4 V at ID = 2.5 mA
Ui and Uo1 > Ut + Uh
high, H,
ID ≤ 25 A at UD = 5.25 V
Fig. 34
Option D5...DD: NPN output, Uo1
≤ 40 V, I
D
≤ 20 mA
Threshold tolerances and hysteresis:
If
Ui is monitored, the internal input voltage after the input
filter and rectifier is measured. Consequently this voltage
differs from the voltage at the connector pins by the voltage
drop
U
ti across input filter and rectifier. The threshold lev-
els of the D0 and D9 options are factory adjusted at nomi-
nal output current
Io nom and at TA = 25°C. The value of Uti
depends upon the threshold level
Ut, temperature and input
current. The input current is a function of the input voltage
and the output power.
Fig. 35
Definition of Uti, DUti and DUhi (JFET output)
Table 19: D-output logic signals
Version of D
Ui < Ut resp. Uo < Ut
Ui > Ut + Uh resp. Uo > Ut
Configuration
D1, D2, D3, D4, D0
low
high
JFET
D5, D6, D7, D8, D9, DD
high
low
NPN
DUti
Uhi
UD low
UD
UD high
Ui
P
o
=
P
o
nom
P
o
=
0
P
o
=
0
Uti
P
o
=
P
o
nom
11021
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相關代理商/技術參數(shù) |
參數(shù)描述 |
|---|---|
| LK1001-7R | 功能描述:線性和開關式電源 Euro-Cassette 150W (5.1V) RoHS:否 制造商:TDK-Lambda 產(chǎn)品:Switching Supplies 開放式框架/封閉式:Enclosed 輸出功率額定值:800 W 輸入電壓:85 VAC to 265 VAC 輸出端數(shù)量:1 輸出電壓（通道 1）:20 V 輸出電流（通道 1）:40 A 商用/醫(yī)用: 輸出電壓（通道 2）: 輸出電流（通道 2）: 安裝風格:Rack 長度: 寬度: 高度: |
| LK1001-9ER | 制造商:Power-One 功能描述:ACDC - Bulk |
| LK100-24P | 制造商:未知廠家 制造商全稱:未知廠家 功能描述:Optoelectronic |
| LK100-28P | 制造商:未知廠家 制造商全稱:未知廠家 功能描述:Optoelectronic |
| LK10051R0K-T | 功能描述:固定電感器 INDCTR STD MULTILYR 0402 1uH 10% RoHS:否 制造商:AVX 電感:10 uH 容差:20 % 最大直流電流:1 A 最大直流電阻:0.075 Ohms 工作溫度范圍:- 40 C to + 85 C 自諧振頻率:38 MHz Q 最小值:40 尺寸:4.45 mm W x 6.6 mm L x 2.92 mm H 屏蔽:Shielded 端接類型:SMD/SMT 封裝 / 箱體:6.6 mm x 4.45 mm |
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