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參數(shù)資料
| 型號： | LM1247AAG/NA/NOPB |
| 廠商： | NATIONAL SEMICONDUCTOR CORP |
| 元件分類： | 音頻／視頻放大 |
| 英文描述： | 3 CHANNEL, VIDEO PREAMPLIFIER, PDIP24 |
| 封裝： | PLASTIC, DIP-24 |
| 文件頁數(shù)： | 14/48頁 |
| 文件大?。?/td> | 3141K |
| 代理商： | LM1247AAG/NA/NOPB |
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OSD Generator Operation (Continued)
Microcontroller Interface
The microcontroller interfaces to the LM1247 preamp using
the I
2C compatible interface. The protocol of the interface
begins with a Start Pulse followed by a byte comprised of a
seven bit Slave Device Address and a Read/Write bit. Since
the first byte is composed of both the address and the
read/write bit, the address of the LM1247 for writing is 0xBA
(10111010b)
and
the
address
for
reading
is
0xBB
(10111011b). The development software provided by Na-
tional Semiconductor will automatically take care of the dif-
ference between the read and write addresses if the target
address under the communications tab is set to 0xBA. Fig-
I
2C compatible interface.
WRITE SEQUENCE
The write sequence begins with a start condition which
consists of the master pulling SDA low while SCL is held
high. The Slave Device Write Address, 0xBA, is sent next.
Each byte that is sent is followed by an acknowledge. When
SCL is high the master will release the SDA line. The slave
must pull SDA low to acknowledge. The register to be written
to is next sent in two bytes, the least significant byte being
sent first. The master can then send the data, which consists
of one or more bytes. Each data byte is followed by an
acknowledge bit. If more than one data byte is sent the data
will increment to the next address location. See Figure 23.
READ SEQUENCE
Read sequences are comprised of two I
2C compatible trans-
fer sequences: The first is a write sequence that only trans-
fers the two byte address to be accessed. The second is a
read sequence that starts at the address transferred in the
previous address only write access and increments to the
next address upon every data byte read. This is shown in
Figure 24. The write sequence consists of the Start Pulse,
the Slave Device Address (0xBA), and the Acknowledge bit;
the next byte is the least significant byte of the address to be
accessed, followed by its Acknowledge bit. This is then
followed by a byte containing the most significant address
byte, followed by its Acknowledge bit. Then a Stop bit indi-
cates the end of the address only write access. Next the read
data access will be performed beginning with the Start
Pulse, the Slave Device Read Address (0xBB), and the
Acknowledge bit. The next 8 bits will be the read data driven
out by the LM1247 preamp associated with the address
indicated by the two address bytes. Subsequent read data
bytes will correspond to the next increment address loca-
tions. Data should only be read from the LM1247 when both
OSD windows are disabled.
20048437
FIGURE 22. Bordering
20048438
FIGURE 23. I
2C Compatible Write Sequence
LM1247
www.national.com
21
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相關(guān)代理商/技術(shù)參數(shù) |
參數(shù)描述 |
|---|---|
| LM1247DMC/NA | 制造商:Texas Instruments 功能描述: |
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| LM124AD | 制造商:STMICROELECTRONICS 制造商全稱:STMicroelectronics 功能描述:LOW POWER QUAD OPERATIONAL AMPLIFIERS |
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