參數(shù)資料
型號: LM224
廠商: ON SEMICONDUCTOR
英文描述: Low Power Quad Operational Amplifiers(低功耗四通道運(yùn)算放大器)
中文描述: 低功耗四運(yùn)算放大器(低功耗四通道運(yùn)算放大器)
文件頁數(shù): 6/16頁
文件大?。?/td> 204K
代理商: LM224
LM324, LM324A, LM224, LM2902, LM2902V, NCV2902
http://onsemi.com
6
CIRCUIT DESCRIPTION
The LM324 series is made using four internally
compensated, two
stage operational amplifiers. The first
stage of each consists of differential input devices Q20 and
Q18 with input buffer transistors Q21 and Q17 and the
differential to single ended converter Q3 and Q4. The first
stage performs not only the first stage gain function but also
performs the level shifting and transconductance reduction
functions. By reducing the transconductance, a smaller
compensation capacitor (only 5.0 pF) can be employed, thus
saving chip area. The transconductance reduction is
accomplished by splitting the collectors of Q20 and Q18.
Another feature of this input stage is that the input common
mode range can include the negative supply or ground, in
single supply operation, without saturating either the input
devices or the differential to single
ended converter. The
second stage consists of a standard current source load
amplifier stage.
Figure 2. Large Signal Voltage Follower Response
V
CC
= 15 Vdc
R
L
= 2.0 k
T
A
= 25
°
C
5.0 s/DIV
1
Each amplifier is biased from an internal
voltage
regulator which has a low temperature coefficient thus
giving each amplifier good temperature characteristics as
well as excellent power supply rejection.
Single Supply
Split Supplies
V
CC
V
EE
/GND
3.0 V to V
CC(max)
1
2
3
4
V
CC
1
2
3
4
V
EE
1.5 V to V
CC(max)
1.5 V to V
EE(max)
Figure 3.
70
60
50
40
30
20
10
01.0
10
100
10000
LOAD CAPACITANCE (pF)
Phase Margin
Figure 4. Gain and Phase Margin
1000
70
60
50
40
30
20
10
0
G
P
°
)
Gain Margin
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