
Absolute Maximum Ratings (Notes 1, 3)
If Military/Aerospace specified devices are required,
please contact the National Semiconductor Sales Office/
Distributors for availability and specifications.
80V Voltage, V
CC1
+90V
120V Supply V
CC2
+130V
Bias Voltage, V
BB
+15V
Input Voltage, V
IN
0V to 4V
V
BLANK Input Voltage, VBLANK
0V to V
BBV
Storage Temperature Range, T
STG
65C to +150C
Lead Temperature
(Soldering, <10 sec.)
300C
ESD Tolerance, Human Body
Model
2 kV
ESD Tolerance, Machine Model
200V
Limits of Operating Ranges (Note 2)
V
CC1
+60V to +85V
V
BOOST
V
CC1 to +125V
V
BB
7.0V to +9V
V
IN
0.8V to +3.5V
V
REF
+1.6V to +1.9V
V
BLANK Input Voltage, VBLANK
0V to 5.5V
V
OUT
+15V to +75V
V
CLAMP
+55V to +118V
Case Temperature
20C to 100C
AC Driver Electrical Characteristics
(See
Figure 4 for Test Circuit)
Unless otherwise noted: V
CC = +80VDC,VBB = +8VDC,VIN = 2.50VDC,CL = 8pF, Output = 40VPP (25-65) at 1MHz, TC = 50C,
V
REF = 1.735VDC, HEATSINK MUST BE GROUNDED.
Symbol
Parameter
Conditions
Min
Typ
Max
Units
I
CC1MAX
V
CC Supply Current
All 3 Channels, No Output Load
32
mA
I
BBMAX
Maximum Bias Current
All 3 Channels
15
mA
V
OUTTYP
Typical DC Output Voltage
V
IN = 2.100 VDC
61
65
69
V
DC
A
VTYP
Typical DC Voltage Gain
No AC Input Signal
52
T
RTYP
Typical Rise Time
10% to 90%, (Note 5)
7.5
ns
+OS
Overshoot on Rising Edge
5
%
t
FTYP
Typical Fall Time
90% to 10%, (Note 5)
7.5
ns
OS
Overshoot on Falling Edge
1
%
LE
TYP
Typical Linearity Error
V
IN 2.0 VDC to 3.0 VDC, (Note 4)
6
%
Note 1: Limits of “Absolute Maximum Ratings” indicate limits below which damage to the device will not occur.
Note 2: Limits of “Operating Ratings” indicate required boundaries of conditions for which the device is functional, but is not guaranteed to meet specific performance
limits.
Note 3: All voltages are measured with respect to GND, unless otherwise specified.
Note 4: Linearity error is the variation in DC gain from VIN = 2.0V to 3.0V.
Note 5: Input from signal generator: tr,tf < 1ns.
Driver Test Circuit
Figure 4 shows the test circuit for the LM2457. This circuit allows testing of the LM2457 in a 50
environment as well as with a
FET probe. The 4950
resistor at the output forms a 200:1 voltage divider when connected to a 50 load. C
COMP is used to
flatten the frequency response of the 200:1 divider. Performance will be affected slightly by the 5K load.
DS101379-4
FIGURE 4. Test Circuit (One Channel)
LM2457
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