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參數(shù)資料
| 型號： | LM2608ATLX-1.3 |
| 廠商： | NATIONAL SEMICONDUCTOR CORP |
| 元件分類： | 穩(wěn)壓器 |
| 英文描述： | 400mA Sub-miniature, High Efficiency, Programmable DC-DC Converter with Linear Mode |
| 中文描述： | 0.518 A SWITCHING REGULATOR, 690 kHz SWITCHING FREQ-MAX, PBGA10 |
| 封裝： | MICRO, SMD-10 |
| 文件頁數(shù)： | 3/18頁 |
| 文件大?。?/td> | 728K |
| 代理商： | LM2608ATLX-1.3 |
Pin Description
Pin Number (*)
A1
B1
Pin Name
FB
VSEL
Function
Feedback Analog Input. Connect to the output at the output filter capacitor (Figure 1)
Output Voltage Selection Input. Set this digital input to:
VDD for 1.8V output voltage (1.5V for LM2608ATL-1.3)
SGND for 1.5V output voltage (1.3V for LM2608ATL-1.3)
External Reference Input. Drive this analog input with a 1.35V reference to set the output
voltage. The LM2608 uses an internal reference while in LDO mode. (see Note 5 in the
Electrical Characteristics table for further information.)
Synchronization Input. Use this digital input for frequency synchronization or mode control.
Set:
SYNC/MODE = high for low-noise 600kHz PWM mode
SYNC/MODE = low for low-current LDO mode
SYNC/MODE = 500kHz - 1MHz external clock for synchronization to an external clock in
PWM mode. See
Synchronization and Operating Modes
in the
Device Information
section.
Enable Input. Set this Schmitt trigger digital input high for normal operation.
Power Ground
Switching Node connection to the internal PFET switch and NFET synchronous rectifier.
Connect to an inductor with a saturation current rating that exceeds the max. Switch Peak
Current Limit specification of the LM2608 (
Figure 1
)
Power Supply Input to the internal PFET switch. Connect to the input filter capacitor
(
Figure 1
).
Analog Supply Input. If board layout is not optimum, an optional 0.1μF ceramic capacitor
is suggested (
Figure 1
)
Analog and Control Ground
(*) Note that the pin numbering scheme for the Micro SMD package was revised in April,2002 to conform to JEDEC standard. Only the pin numbers were revised.
No changes to the physical location of the inputs/outputs were made. For reference purpose, the obsolete numbering had FB as pin 1, VSEL as pin 2, VREF as pin
3, SYNC as pin 4, EN as pin 5, PGND as pin 6, SW as pin 7, PVIN as pin 8, VDD as pin 9 and SGND as pin 10.
C1
VREF
D1
SYNC/MODE
D2
D3
C3
EN
PGND
SW
B3
PVIN
A3
VDD
A2
SGND
L
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