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參數(shù)資料
| 型號(hào)： | LM2681 |
| 文件頁(yè)數(shù)： | 3/9頁(yè) |
| 文件大小： | 244K |
| 代理商： | LM2681 |
Absolute Maximum Ratings
(Note 1)
If Military/Aerospace specified devices are required,
please contact the National Semiconductor Sales Office/
Distributors for availability and specifications.
Supply Voltage (V
IN
to GND or
GND to V
NEG
)
SDN, SDP, CE
6.8V
(GND 0.3V) to
(V
IN
+ 0.3V)
V
05
Continuous Output Current
V
05
Short-Circuit Duration to GND
(Note 2)
80mA
Indefinite
Continuous Power Dissipation (T
A
= 25C) (Note 3)
T
JMAX
(Note 3)
θ
JA
(Note 3)
Operating Ambient Temp. Range
Operating Junction Temp. Range
Storage Temp. Range
Lead Temp. (Soldering, 10 sec.)
ESD Rating (Note 4)
600mW
150C
140C/W
40C to 85C
40C to 125C
65C to 150C
300C
2kV
Electrical Characteristics
Limits with standard typeface apply for T
J
= 25C, and limits in
boldface type
apply over the full temperature range. Unless
otherwise specified V
IN
= 3.6V, C
1
= C
2
= C
3
= C
5
= 2.2μF. C
4
= 4.7μF (Note 5)
Symbol
Parameter
Conditions
V
+
Supply Voltage
I
Q
Supply Current
No Load
No Load, V
IN
= 6.5V
I
SD
Shutdown Supply Current
V
IN
= 6.5V
V
SD
Shutdown Pin Input Voltage for
CE, SDP, SDN
Logic Input Low
@
6.5V
I
L
(+5V)
Output Current at V
05
R
O
(5V)
Output Resistance at V
NEG
I
L
= 15mA (Note 6)
F
SW
Switch Frequency
P
EFF
Average Power Efficiency at V
05
2.85V
≤
V
IN
≤
6.5V
I
L
= 25mA to GND
V
05
Output Regulation
(Note 7)
1mA
<
I
L
<
50mA, V
IN
= 6.5V
(Note 7)
G
LINE
Line Regulation
3.6V
<
V
IN
<
6.5V
G
LOAD
Load Regulation
R
SW
Series Switch Resistance V
NEG
to
V
NSW
V
05
to V
PSW
Note 1:
Absolute Maximum Ratings indicate limits beyond which damage to the device may occur. Operating Ratings indicate conditions for which the device is in-
tended to be functional, but do not guarantee specific performance limits. For guaranteed specifications and test conditions, see the Electrical Characteristics.
Note 2:
V
05
may be shorted to GND without damage. However, shorting V
NEG
to V
05
may damage the device and must be avoided. Also, for temperature above
85C, V
05
must not be shorted to GND or device may be damaged.
Note 3:
The maximum allowable power dissipation is calculated by using P
= (T
— T
)/
θ
JA
, where T
JMAX
is the maximum junction temperature, T
A
is the
ambient temperature and
θ
JA
is the junction-to-ambient thermal resistance of the specified package.
Note 4:
The human body model is a 100 pF capacitor discharged through a 1.5k
resistor into each pin.
Note 5:
In the typical operating circuit, capacitors C
1
and C
2
are 2.2μF, 0.3
maximum ESR capacitors. Capacitors with higher ESR will increase output resistance,
reduce output voltage and efficiency.
Note 6:
Specified output resistance includes internal switch resistance and ESR of capacitors. See the Detailed Device Description section.
Note 7:
The 50 mA maximum current assumes no current is drawn from V
DBL
pin. See Voltage Doubler section in the Detailed Device Description.
Min
2.85
Typ
Max
6.5
1600
600
30
Units
V
800
300
6
μA
μA
Logic Input High
@
6.5V
2.4
V
0.8
50
40
180
2.85V
<
V
IN
<
6.5V
mA
kHz
%
20
130
82
85
1mA
<
I
L
<
50mA, V
IN
= 6.5V
4.848
5.05
5.252
V
4.797
5.05
5.303
2.85V
<
V
IN
<
3.6V
0.25
0.05
0.3
1.5
%/V
1mA
<
I
L
<
50mA, V
IN
= 6.5V
V
IN
>
2.85V
1.0
%
5.0
L
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