參數(shù)資料
型號: LM2717MT
廠商: NATIONAL SEMICONDUCTOR CORP
元件分類: 穩(wěn)壓器
英文描述: Dual Step-down DC/DC Converter
中文描述: 3.2 A SWITCHING REGULATOR, 600 kHz SWITCHING FREQ-MAX, PDSO24
封裝: TSSOP-24
文件頁數(shù): 6/12頁
文件大小: 673K
代理商: LM2717MT
Electrical Characteristics
(Continued)
Specifications in standard type face are for T
= 25C and those with
boldface type
apply over the full
Operating Tempera-
ture Range
(T
J
= 40C to +125C). V
IN
= 5V, I
L
= 0A, and F
SW
= 300kHz unless otherwise specified.
Symbol
Parameter
Conditions
Min
(Note 4)
Typ
(Note 5)
Max
(Note 4)
Units
I
SHDN1
Fixed Buck Shutdown Pin
Current
Adjustable Buck Shutdown
Pin Current
Fixed Buck Switch Leakage
Current
Adjustable Buck Switch
Leakage Current
Fixed Buck Switch R
DSON
(Note 9)
Adjustable Buck Switch
R
DSON
(Note 9)
Fixed Buck SHDN Threshold
0V
<
V
SHDN1
<
7.5V
5
5
μA
I
SHDN2
0V
<
V
SHDN2
<
7.5V
5
5
μA
I
L1
V
IN
= 20V
0.01
5
μA
I
L2
V
IN
= 20V
0.01
5
μA
R
DSON1
160
m
R
DSON2
160
m
Th
SHDN1
Output High
Output Low
Output High
Output Low
1.8
1.36
1.33
1.36
1.33
V
0.7
Th
SHDN2
Adjustable Buck SHDN
Threshold
1.8
V
0.7
I
SS1
Fixed Buck Soft Start Pin
Current
Adjustable Buck Soft Start
Pin Current
On Threshold
Off Threshold
Thermal Resistance
(Note 10)
4
9
15
μA
I
SS2
4
9
15
μA
UVP
4
3.8
3.6
V
3.3
θ
JA
TSSOP, package only
115
C/W
Note 1:
Absolute maximum ratings are limits beyond which damage to the device may occur. Operating Ratings are conditions for which the device is intended to
be functional, but device parameter specifications may not be guaranteed. For guaranteed specifications and test conditions, see the Electrical Characteristics.
Note 2:
The maximum allowable power dissipation is a function of the maximum junction temperature, T
J
(MAX), the junction-to-ambient thermal resistance,
θ
JA
,
and the ambient temperature, T
A
. See the Electrical Characteristics table for the thermal resistance. The maximum allowable power dissipation at any ambient
temperature is calculated using: P
D
(MAX) = (T
J(MAX)
T
A
)/
θ
JA
. Exceeding the maximum allowable power dissipation will cause excessive die temperature, and the
regulator will go into thermal shutdown.
Note 3:
The human body model is a 100 pF capacitor discharged through a 1.5k
resistor into each pin.
Note 4:
All limits guaranteed at room temperature (standard typeface) and at temperature extremes (bold typeface). All room temperature limits are 100% tested
or guaranteed through statistical analysis.All limits at temperature extremes are guaranteed via correlation using standard Statistical Quality Control (SQC) methods.
All limits are used to calculate Average Outgoing Quality Level (AOQL).
Note 5:
Typical numbers are at 25C and represent the most likely norm.
Note 6:
Duty cycle affects current limit due to ramp generator.
Note 7:
Current limit at 0% duty cycle. See
TYPICAL PERFORMANCE
section for Switch Current Limit vs. V
IN
Note 8:
Bias current flows into FB pin.
Note 9:
Includes the bond wires, R
DSON
from V
IN
pin(s) to SW pin.
Note 10:
Refer to National’s packaging website for more detailed thermal information and mounting techniques for the TSSOP package.
L
www.national.com
6
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