參數(shù)資料
型號: LM2750LD-5.0
廠商: NATIONAL SEMICONDUCTOR CORP
元件分類: 穩(wěn)壓器
英文描述: Low Noise, 5.0V Regulated Switched Capacitor Voltage Converter
中文描述: SWITCHED CAPACITOR REGULATOR, PDSO10
封裝: 3 X 3 MM, LLP-10
文件頁數(shù): 12/15頁
文件大小: 370K
代理商: LM2750LD-5.0
Application Information
(Continued)
LAYOUT RECOMMENDATIONS
A good board layout of the LM2750 circuit is required to
achieve optimal assembly, electical, and thermal dissipation
perfromance.
Figure 4
is an example of a board layout
implementing recommended techniques. For more informa-
tion related to layout for the LLP package, refer to National
Semiconductor’s
Application Note 1187: Leadless Lead-
frame Package (LLP)
. Below are some general guidelines
for board layout:
Place capacitors as close to the as possible to the
LM2750, and on the same side of the board. V
IN
and
V
OUT
connections are most critical: run short traces from
the LM2750 pads directly to these capacitor pads.
Connect the ground pins of the LM2750 and the capaci-
tors to a good ground plane. The ground plane is essen-
tial for both electrical and thermal disspation perfor-
mance.
For optimal thermal performance, make the ground
plane(s) as large as possible. Connect the die-attach pad
(DAP) of the LM2750 to the ground plane(s) with wide
traces and/or multiple vias. Top-layer ground planes are
most effective in increasing the thermal dissipation capa-
bility of the LLP package. Large internal ground planes
are also very effective in keeping the die temperature of
the LM2750 within operating ratings.
20035110
FIGURE 3. LM2750 Model for Power Efficiency and
Power Dissipation Calculations
20035126
FIGURE 4. LM2750-5.0 Recommended Layout
L
www.national.com
12
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