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參數(shù)資料
| 型號： | LM2770SDX-12157 |
| 廠商： | NATIONAL SEMICONDUCTOR CORP |
| 元件分類： | 穩(wěn)壓器 |
| 英文描述： | High Efficiency Switched Capacitor Step-Down DC/DC Regulator with Sleep Mode |
| 中文描述： | SWITCHED CAPACITOR REGULATOR, 925 kHz SWITCHING FREQ-MAX, DSO10 |
| 封裝： | 3 X 3 MM, 0.80 MM HEIGHT, LEAD FREE, PLL-10 |
| 文件頁數(shù)： | 4/14頁 |
| 文件大小： | 796K |
| 代理商： | LM2770SDX-12157 |
Electrical Characteristics
(Notes 2, 9) (Continued)
Limits in standard typeface are for T
= 25
o
C. Limits in
boldface
type apply over the full operating junction temperature range
(-30C
≤
T
≤
+105C) . Unless otherwise noted, specifications apply to the LM2770 Typical Application Circuit (pg. 1) with: V
IN
= 3.6V; V(EN) = V
SEL
= 1.8V, V(SLEEP) = 0V, C
IN
= C
OUT
= 10μF, C
1
= C
2
= 1.0μF. (Note 10)
Symbol
Parameter
Condition
V
LDO-1215
LM2770-1215:
1.5V Output Voltage Regulation
- SLEEP Mode
V
SEL
= 0V, V(SLEEP) = 1.8V
LM2770-1215:
1.2V Output Voltage Regulation
- SLEEP Mode
V
SEL
= 0V, V(SLEEP) = 1.8V
V
LDO-12157
LM2770-12157:
1.575V Output Voltage
Regulation - SLEEP Mode
V
SEL
= 0V, V(SLEEP) = 1.8V
LM2770-12157:
1.2V Output Voltage Regulation
- SLEEP Mode
V
SEL
= 0V, V(SLEEP) = 1.8V
Specifications Below Apply to All LM2770 Options
E
Power Efficiency
V
IN
= 3.6V, I
OUT
= 150mA
V
OUT
=1.5V
E
AVG
Average Eficiency over Li-Ion
Input Voltage Range (Note 11)
I
OUT
= 200mA, V
OUT
= 1.5V
I
Q
Quiescent Supply Current:
Full-power Mode
I
OUT
= 0mA
V(SLEEP) = 0V
I
SLEEP
Quiescent Supply Current:
Sleep Mode
I
OUT
= 0mA
V(SLEEP) = 1.8V
I
SD
Shutdown Current
2.7V
≤
V
IN
≤
5.5V
V(EN) = 0V
I
CL
Current Limit - Sleep Mode
0V
≤
V
OUT
≤
0.2V
V(SLEEP) = 1.8V
t
ON
Turn-on Time
V
IN
= 3.6V, C
OUT
= 10μF
F
SW
Switching Frequency
2.7V
≤
V
IN
≤
5.5V
Logic Pin Specifications: EN, ENA, ENB
V
IL
Logic-low Input Voltage
2.7V
≤
V
IN
≤
5.5V
V
IH
Logic-high Input Voltage
2.7V
≤
V
IN
≤
5.5V
I
IH
Logic-high Input Current:
SLEEP and V
SEL
pins
I
IH-EN
Logic-high Input Current: EN pin
(Note 12)
I
IL
Logic-low Input Current: All
Logic Pins
Min
1.435
Typ
1.495
Max
1.555
Units
V
3.0V
≤
V
IN
≤
5.5V,
0mA
≤
I
OUT
≤
20mA,
3.0V
≤
V
IN
≤
5.5V,
0mA
≤
I
OUT
≤
20mA,
1.145
1.205
1.265
3.0V
≤
V
IN
≤
5.5V,
0mA
≤
I
OUT
≤
20mA,
1.520
1.575
1.630
V
3.0V
≤
V
IN
≤
5.5V,
0mA
≤
I
OUT
≤
20mA,
1.150
1.210
1.270
82
%
3.0V
≤
V
IN
≤
4.2V
73
%
2.7V
≤
V
IN
≤
5.5V
55
75
μA
2.7V
≤
V
IN
≤
5.5V
50
65
μA
0.1
0.5
μA
60
mA
200
700
μs
kHz
475
925
0
0.4
V
IN
V
V
μA
1.0
Logic Input = 3.0V
0.1
V(EN) = 1.8V
6
μA
Logic Input = 0V
0
μA
Note 1:
Absolute Maximum Ratings indicate limits beyond which damage to the component may occur. Operating Ratings are conditions under which operation of
the device is guaranteed. Operating Ratings do not imply guaranteed performance limits. For guaranteed performance limits and associated test conditions, see the
Electrical Characteristics tables.
Note 2:
All voltages are with respect to the potential at the GND pin.
Note 3:
Internal thermal shutdown circuitry protects the device from permanent damage. Thermal shutdown engages at T
J
=150
o
C (typ.) and disengages at
T
J
=140
o
C (typ.).
Note 4:
Short circuit protection circuitry protects the part from immediate destructive failure when V
OUT
is shorted to GND. Applying a continuous GND short to the
output may shorten the lifetime of the device.
Note 5:
For detailed information on soldering requirements and recommendations, please refer to National Semiconductor’s
Application Note 1187 (AN-1187):
Leadless Leadframe Package (LLP)
.
Note 6:
The Human body model is a 100pF capacitor discharged through a 1.5k
resistor into each pin. The machine model is a 200pF capacitor discharged
directly into each pin. MIL-STD-883 3015.7
L
www.national.com
4
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