Philips Semiconductors
Product specification
LM193/A/293/A/393/A/2903
Low power dual voltage comparator
1995 Nov 27
4
DC ELECTRICAL CHARACTERISTICS
(Continued)
V+=5VDC, LM193/193A: -55
°
C T
A
≤
+125
°
C, unless otherwise specified. LM293/293A: -25
°
C T
A
≤
+85
°
C, unless otherwise specified.
LM393/393A: 0
°
C T
A
≤
+70
°
C, unless otherwise specified. LM2903: -40
°
C T
A
≤
+125
°
C, unless otherwise specified.
SYMBOL
PARAMETER
TEST CONDITIONS
LM193
Typ
±
2.0
LM293/393
Typ
±
2.0
UNIT
Min
Max
±
5.0
±
9.0
V
±
-1.5
V
±
-2.0
Min
Max
±
5.0
±
9.0
V+-1.5
V+-2.0
V
OS
Input offset voltage
2
T
A
=25
°
C
Over temp.
T
A
=25
°
C
Over temp.
Keep all V
IN
s
≥
0V
DC
(or V-if need)
I
IN(+)
or I
IN(-)
with output
in linear range
T
A
=25
°
C
Over temp.
I
IN(+)
-I
IN(-)
T
A
=25
°
C
Over temp.
V
IN(-)
≥
1V
DC
, V
IN(+)
=0,
V
0
≤
1.5V
DC
T
A
=25
°
C
V
IN(+)
≥
1V
DC
, V
IN(-)
=0,
V
0
=5V
DC
T
A
=25
°
C
V
0
=30VDC over temp.
R
L
=
∞
on both comparators,
T
A
=25
°
C
R
L
=
∞
on both comparators,
V+=30V
R
L
≥
15k
, V+=15V
DC
V
IN(-)
≥
1V
DC
, V
IN(+)
=0,
I
SINK
≤
4mA
T
A
=25
°
C
Over temp.
V
IN
=TTL logic swing,
V
REF
=1.4V
DC
, V
RL
=5V
DC
R
L
=5.1k
,
T
A
=25
°
C
V
RL
=5V
DC
,
R
L
=5.1k
T
A
=25
°
C
mV
mV
V
V
V
CM
Input common-mode
voltage range
3, 6
Differential input
voltage
1
0
0
0
0
V
IDR
V+
V+
V
I
BIAS
Input bias current
4
25
100
300
25
250
400
nA
nA
I
OS
Input offset current
±
3.0
±
25
±
100
±
5.0
±
50
±
150
nA
nA
I
OL
Output sink current
6.0
16
6.0
16
mA
Output leakage current
0.1
1.0
0.1
1.0
nA
μ
A
I
CC
Supply current
0.8
1
0.8
1
mA
2.5
2.5
mA
A
V
Voltage gain
50
200
50
200
V/mV
V
OL
Saturation voltage
250
400
700
250
400
700
mV
mV
t
LSR
Large signal
response time
300
300
ns
t
R
Response time
5
1.3
1.3
μ
s
NOTES:
1. Positive excursions of input voltage may exceed the power supply level by 17V. As long as the other voltage remains within the
common-mode range, the comparator will provide a proper output state. The low input voltage state must not be less than -0.3V
DC
(V
DC
below the magnitude of the negative power supply, if used).
2. At output switch point, V
≈
1.4V
, R
=0
with V+ from 5V
to 30V
and over the full input common-mode range (0V
to V+-1.5V
).
3. The input common-mode voltage or either input signal voltage should not be allowed to go negative by more than 0.3V. The upper end of the
common-mode voltage range is V+-1.5V, but either or both inputs can go to 30V
DC
without damage.
4. The direction of the input current is out of the IC due to the PNP input stage. This current is essentially constant, independent of the state of
the output so no loading change exists on the reference or input lines.
5. The response time specified is for a 100mV input step with a 5mV overdrive.
6. For input signals that exceed V
CC
, only the over-driven comparator is affected. With a 5V supply, V
IN
should be limited to 25V maximum,
and a limiting resistor should be used on all inputs that might exceed the positive supply.