Note 3:
Current flows into the pin.
Note 4:
The maximum allowable power dissipation is a function of the maximum junction temperature, T
(MAX), the junction-to-ambient thermal resistance,
θ
,
and the ambient temperature, T
A
. See Thermal Properties for the thermal resistance. The maximum allowable power dissipation at any ambient temperature is
calculated using: P
D
(MAX) = (T
J
(MAX) – T
A
)/
θ
JA
. Exceeding the maximum allowable power dissipation will cause excessive die temperature.
Note 5:
The on threshold indicates that the LM3557 is no longer switching or regulating LED current, while the off threshold indicates normal operation.
Note 6:
All voltages are with respect to the potential at the GND pin.
Note 7:
Junction-to-ambient thermal resistance (
θ
JA
) is taken from a thermal modeling result, performed under the conditions and guidelines set forth in the JEDEC
standard JESD51-7. The test board is a 4 layer FR-4 board measuring 102 mm x 76 mm x 1.6 mm with a 2 x 1 array of thermal vias. The ground plane on the board
is 50 mm x 50 mm. Thickness of copper layers are 36 μm/18 μm/18 μm/36 μm (1.5 oz/1 oz/1 oz/1.5 oz). Ambient temperature in simulation is 22C, still air. Power
dissipation is 1W.
In applications where high maximum power dissipation exists, special care must be paid to thermal dissipation issues. For more information on these topics, please
refer to
Application Note 1187: Leadless Leadframe Package (LLP)
and the
Layout Guidelines
section of this datasheet.
Note 8:
Min and Max limits are guaranteed by design, test, or statistical analysis. Typical numbers are not guaranteed, but do represent the most likely norm.
Note 9:
Feedback pin voltage is with respect to the voltage at the Sw2 pin.
Note 10:
The Power Switch Current Limit is tested in open loop configuration. For closed loop application current limit please see the Current Limit vs Temperature
performance graph.
Block Diagram
Operation
The
LM3557
frequency step-up converter optimized for the facilitation of
white LED driving/current biasing.
The LM3557’s operation can be best understood by the
following device functionality explanation. For the following
device functionality explanation, the block diagram in
Figure
2
serves as a functional schematic representation of the
underlying circuit blocks that make up the LM3557. When
the feedback voltage falls below, or rises above, the internal
is
a
current-mode
controlled
constant-
reference voltage, the error amplifier outputs a signal that is
translated into the correct amount of stored energy within the
inductor that is required to put the feedback voltage back into
regulation when the stored inductor energy is then trans-
ferred to the load. The aforementioned translation is a con-
version of the error amplifier’s output signal to the proper
on-time duration of the N1 power field effect transistor (FET).
This conversion allows the inductor’s stored energy to in-
crease, or decrease, to a sufficient level that when trans-
ferred to the load will bring the feedback voltage back into
regulation.
20131603
FIGURE 2. Block Diagram
L
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