參數(shù)資料
型號: LM358AJ
廠商: 意法半導(dǎo)體
英文描述: Low power dual operational amplifiers
中文描述: 低功耗雙運算放大器
文件頁數(shù): 5/12頁
文件大小: 128K
代理商: LM358AJ
Philips Semiconductors
Product data
NE/SA/SE532/
LM258/358/A/2904
Low power dual operational amplifiers
2002 Jul 12
5
DC ELECTRICAL CHARACTERISTICS
(continued)
T
amb
= 25
°
C; V+ = +5 V; unless otherwise specified.
SYMBOL
PARAMETER
TEST CONDITIONS
LM358A
UNIT
Min
Typ
±
2
Max
±
3
±
5
20
±
30
±
75
300
V
OS
Offset voltage
1
R
S
= 0
mV
R
S
= 0
; over temp.
R
S
= 0
; over temp.
I
IN(+)
– I
IN(–)
Over temp.
mV
μ
V/
°
C
nA
V
OS
Drift
7
I
OS
Offset current
5
nA
I
OS
Drift
Over temp.
10
pA/
°
C
nA
I
BIAS
Input current
2
I
IN(+)
or I
IN(–)
I
IN(+)
or I
IN(–)
; Over temp.
Over temp.
45
100
40
200
nA
I
B
Drift
50
pA/
°
C
V
V
CM
Common mode voltage range
Common-mode voltage range
3
V+ = 30 V
0
V+–1.5
V+ = 30 V; Over temp.
0
V+–2.0
V
CMRR
Common-mode rejection ratio
V+ = 30 V
65
85
dB
V
OH
Output voltage swing
R
L
2 k
; V+ = 30 V; over temp.
R
L
10 k
; V+ = 30 V; over temp.
R
L
10 k
; over temp.
R
L
=
, V+ = 30 V
R
L
=
on all amplifiers; V+ = 30 V; over temp.
R
L
2 k
; V
OUT
±
10 V
V+ = 15 V (for large V
O
swing); over temp.
R
S
= 0
f=1kHz to 20kHz (input referred)
26
V
27
28
V
V
OL
Output voltage swing
5
20
mV
CC
I
Supply current
0.5
1.0
mA
0.6
1.2
mA
A
VOL
Large signal voltage gain
Large-signal voltage gain
25
100
V/mV
15
V/mV
PSRR
Supply voltage rejection ratio
Amplifier-to-amplifier coupling
4
65
100
dB
–120
dB
V
IN+
= +1 V
DC
; V
IN–
= 0 V
DC
; V+ = 15 V
DC
V
IN+
= +1 V
DC
; V
IN–
= 0 V
DC
; V+ = 15 V
DC
;
over temp.
20
40
mA
Output current (Source)
10
20
mA
I
OUT
V
IN–
= +1 V
DC
,;V
IN+
= 0 V
DC
; V+ = 15 V
DC
V
IN–
= +1 V
DC
; V
IN+
= 0 V
DC
;V+ = 15 V
DC
;
over temp.
10
20
mA
Output current (Sink)
5
8
mA
V
IN+
= 0 V; V
IN–
= +1 V
DC
; V
O
= 200 mV
12
50
μ
A
mA
I
SC
Short circuit current
5
Differential input voltage
6
40
60
V+
V
GBW
Unity gain bandwidth
T
amb
= 25
°
C
T
amb
= 25
°
C
T
amb
= 25
°
C; f = 1 kHz
1
MHz
V/
μ
s
nV/
Hz
SR
Slew rate
0.3
V
NOISE
NOTES:
1. V
O
1.4 V, R
S
= 0
with V+ from 5 V to 30 V; and over the full input common-mode range (0 V to V+ –1.5 V).
2. The direction of the input current is out of the IC due to the PNP input stage. This current is essentially constant, independent of the state of
the output so no loading change exists on the input lines.
3. The input common-mode voltage or either input signal voltage should not be allowed to go negative by more than 0.3 V. The upper end of
the common-mode voltage range is V+ –1.5 V, but either or both inputs can go to +32 V without damage.
4. Due to proximity of external components, insure that coupling is not originating via stray capacitance between these external parts. This
typically can be detected as this type of capacitance coupling increases at higher frequencies.
5. Short-circuits from the output to V+ can cause excessive heating and eventual destruction. The maximum output current is approximately
40 mA independent of the magnitude of V+. At values of supply voltage in excess of +15 V
DC
, continuous short-circuits can exceed the
power dissipation ratings and cause eventual destruction.
6. The input common-mode voltage or either input signal voltage should not be allowed to go negative by more than 0.3 V. The upper end of
the common-mode voltage range is V+ –1.5 V, but either or both inputs can go to +32 V
DC
without damage.
Input noise voltage
40
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