參數(shù)資料
型號: LM4040D25ILPM
廠商: TEXAS INSTRUMENTS INC
元件分類: 基準電壓源/電流源
英文描述: 1-OUTPUT TWO TERM VOLTAGE REFERENCE, 2.5 V, PBCY3
封裝: PLASTIC, TO-226, TO-92, 3 PIN
文件頁數(shù): 20/51頁
文件大?。?/td> 730K
代理商: LM4040D25ILPM
APPLICATION INFORMATION
Start-Up Characteristics
1-Hz Rate
VZ
LM4040
RS
VIN
Output Capacitor
SOT-23 Connections
Use With ADCs or DACs
28
27
26
25
24
23
22
21
20
19
18
17
16
15
14
13
12
11
10
9
8
1
2
3
4
5
6
7
VREF
AIN0
AIN1
AIN2
AGND
DB11
DB10
DB9
DB8
DB7
DB6
DB5
DGND
AIN3
VANA
2.2
F
A1
A0
CLK
DB0
DB1
DB2
DB3
DB4
VDIG
BUSY
WR
CS
RD
3.2-MHz Clock
BUSY Output
Write Input
Read Input
5-V Analog Supply
10
F
+
0.1
F
ADS7842
LM4040A-41
909
0 V to VREF
5 V
LM4040
www.ti.com .................................................................................................................................................. SLOS456K – JANUARY 2005 – REVISED MARCH 2008
Figure 7. Test Circuit
The LM4040 does not require an output capacitor across cathode and anode for stability. However, if an output
bypass capacitor is desired, the LM4040 is designed to be stable with all capacitive loads.
There is a parasitic Schottky diode connected between pins 2 and 3 of the SOT-23 packaged device. Thus, pin 3
of the SOT-23 package must be left floating or connected to pin 2.
The LM4040x-41 is designed to be a cost-effective voltage reference as required in 12-bit data-acquisition
systems. For 12-bit systems operating from 5-V supplies such as the ADS7842 (see Figure 8), the LM4040x-41
(4.096 V) permits operation with an LSB of 1 mV.
Figure 8. Data-Acquisition Circuit With LM4040x-41
Copyright 2005–2008, Texas Instruments Incorporated
27
相關(guān)PDF資料
PDF描述
LM4040B41IDCKT 1-OUTPUT TWO TERM VOLTAGE REFERENCE, 4.096 V, PDSO6
LM4040C50IDCKT 1-OUTPUT TWO TERM VOLTAGE REFERENCE, 5 V, PDSO6
LM4040D10IDCKT 1-OUTPUT TWO TERM VOLTAGE REFERENCE, 10 V, PDSO6
LM4040A25IDCKT 1-OUTPUT TWO TERM VOLTAGE REFERENCE, 2.5 V, PDSO6
LM4040C10IDCKT 1-OUTPUT TWO TERM VOLTAGE REFERENCE, 10 V, PDSO6
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