參數(shù)資料
型號: LM4120AI1.8MWC
廠商: NATIONAL SEMICONDUCTOR CORP
元件分類: 基準(zhǔn)電壓源/電流源
英文描述: 1-OUTPUT THREE TERM VOLTAGE REFERENCE, 1.8 V, UUC
封裝: WAFER
文件頁數(shù): 15/16頁
文件大?。?/td> 391K
代理商: LM4120AI1.8MWC
Pin Functions
Output (Pin 5): Reference Output.
Input (Pin 4):Positive Supply.
Ground (Pin 2):Negative Supply or Ground Connection.
Enable (Pin 3):Pulled to input for normal operation. Forcing
this pin to ground will turn-off the output.
REF (Pin 1):REF Pin. This pin should be left unconnected.
Application Hints
The standard application circuit for the LM4120 is shown in
Figure 1. It is designed to be stable with ceramic output ca-
pacitors in the range of 0.022F to 0.047F. Note that
0.022F is the minimum required output capacitor. These ca-
pacitors typically have an ESR of about 0.1 to 0.5
. Smaller
ESR can be tolerated, however larger ESR can not. The out-
put capacitor can be increased to improve load transient re-
sponse, up to about 1F. However, values above 0.047F
must be tantalum. With tantalum capacitors, in the 1F
range, a small capacitor between the output and the refer-
ence pin is required. This capacitor will typically be in the
50pF range. Care must be taken when using output capaci-
tors of 1F or larger. These application must be thoroughly
tested over temperature, line and load.
An input capacitor is typically not required. However, a 0.1F
ceramic can be used to help prevent line transients from en-
tering the LM4120. Larger input capacitors should be tanta-
lum or aluminium.
The reference pin is sensitive to noise, and capacitive load-
ing. Therefore, the PCB layout should isolate this pin as
much as possible.
The enable pin is an analog input with very little hysteresis.
About 6A into this pin is required to turn the part on, and it
must be taken close to GND to turn the part off (see spec.
table for thresholds). There is a
minimum slew rate on this
pin of about 0.003V/S to prevent glitches on the output. All
of these conditions can easily be met with ordinary CMOS or
TTL logic. If the shutdown feature is not required, then this
pin can safely be connected directly to the input supply.
Floating this pin is not recommended.
Input Capacitor
Noise on the power-supply input can effect the output noise,
but can be reduced by using an optional bypass capacitor
between the input pin and the ground.
Printed Circuit Board Layout Consideration
The mechanical stress due to PC board mounting can cause
the output voltage to shift from its initial value. References in
SOT packages are generally less prone to assembly stress
than devices in Small Outline (SOIC) package.
To reduce the stress-related output voltage shifts, mount the
reference on the low flex areas of the PC board such as near
to the edge or the corner of the PC board.
DS101047-32
FIGURE 1.
LM4120
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