In order to eliminate "clicks and pops", all cap" />
參數(shù)資料
型號: LM4819MX/NOPB
廠商: National Semiconductor
文件頁數(shù): 5/27頁
文件大?。?/td> 0K
描述: IC AMP AUDIO PWR .35W MONO 8SOIC
標(biāo)準(zhǔn)包裝: 1
系列: Boomer®
類型: AB 類
輸出類型: 1-通道(單聲道)
在某負(fù)載時最大輸出功率 x 通道數(shù)量: 350mW x 1 @ 16 歐姆
電源電壓: 2 V ~ 5.5 V
特點(diǎn): 消除爆音,差分輸入,關(guān)閉
安裝類型: 表面貼裝
供應(yīng)商設(shè)備封裝: 8-SOIC
封裝/外殼: 8-SOIC(0.154",3.90mm 寬)
包裝: 剪切帶 (CT)
其它名稱: *LM4819MX/NOPB
LM4819MX/NOPBCT
SNAS133D – FEBRUARY 2001 – REVISED MARCH 2013
In order to eliminate "clicks and pops", all capacitors must be discharged before turn-on. Rapidly switching VDD
may not allow the capacitors to fully discharge, which may cause "clicks and pops".
AUDIO POWER AMPLIFIER DESIGN EXAMPLE
The following are the desired operational parameters:
Given:
Power Output
100mW
Load Impedance
16
Input Level
1Vrms (max)
Input Impedance
20k
Bandwidth
100Hz–20kHz ± 0.25dB
The design begins by specifying the minimum supply voltage necessary to obtain the specified output power. To
find this minimum supply voltage, use the Output Power vs. Supply Voltage graph in the Typical Performance
Characteristics section. From the graph for a 16
load, (graphs are for 8, 16, and 32 loads) the supply
voltage for 100mW of output power with 1% THD+N is approximately 3.15 volts.
Additional supply voltage creates the benefit of increased headroom that allows the LM4819 to reproduce peaks
in excess of 100mW without output signal clipping or audible distortion. The choice of supply voltage must also
not create a situation that violates maximum dissipation as explained above in the Power Dissipation section. For
example, if a 3.3V supply is chosen for extra headroom then according to Equation 3 the maximum power
dissipation point with a 16
load is 138mW. Using Equation 4 the maximum ambient temperature is 121°C for
the DGK0008A package and 126°C for the D0008A package.
After satisfying the LM4819's power dissipation requirements, the minimum differential gain is found using
(6)
Thus a minimum gain of 1.27 V/V allows the LM4819 to reach full output swing and maintain low noise and
THD+N performance. For this example, let AVD = 1.27. The amplifier's overall gain is set using the input (Ri) and
feedback (RF) resistors. With the desired input impedance set to 20k, the feedback resistor is found using
RF/Ri = AVD/2 (V/V)
(7)
The value of RF is 13k.
The last step in this design example is setting the amplifier's -3dB frequency bandwidth. To achieve the desired
±0.25dB pass band magnitude variation limit, the low frequency response must extend to at least one-fifth the
lower bandwidth limit and the high frequency response must extend to at least five times the upper bandwidth
limit. The gain variation for both response limits is 0.17dB, well with in the ±0.25dB desired limit.
The results are:
fL = 100Hz/5 = 20Hz
fH = 20 kHz*5 = 100kHz
As mentioned in the External Components section, Ri and Ci create a high pass filter that sets the amplifier's
lower band pass frequency limit. Find the coupling capacitor's value using Equation 8.
Ci ≥ 1/(2πRifc) (F)
(8)
Ci ≥ 0.398F, a standard value of 0.39F will be used. The product of the desired high frequency cutoff (100kHz
in this example) and the differential gain, AVD, determines the upper pass band response limit. With AVD = 1.27
and fH = 100kHz, the closed-loop gain bandwidth product (GBWP) is 127kHz. This is less than the LM4819's
900kHz GBWP. With this margin the amplifier can be used in designs that require more differential gain while
avoiding performance restricting bandwidth limitations.
Copyright 2001–2013, Texas Instruments Incorporated
13
Product Folder Links: LM4819 LM4819MBD
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