參數(shù)資料
型號(hào): LM4850MTX/NOPB
廠商: NATIONAL SEMICONDUCTOR CORP
元件分類: 音頻/視頻放大
英文描述: 0.3 W, 2 CHANNEL, AUDIO AMPLIFIER, PDSO14
封裝: 4.40 MM, PLASTIC, TSSOP-14
文件頁(yè)數(shù): 2/18頁(yè)
文件大?。?/td> 1273K
代理商: LM4850MTX/NOPB
Application Information (Continued)
amplifier’s closed-loop gain without causing excessive out-
put signal clipping, please refer to the Audio Power Ampli-
fier Design section.
A bridge configuration, such as the one used in LM4850,
also creates a second advantage over single-ended amplifi-
ers. Since the differential outputs, BTL OUT- and BTL OUT+,
are biased at half-supply, no net DC voltage exists across
the load. This eliminates the need for the output coupling
capacitor that a single supply, single-ended amplifier con-
figuration requires. Eliminating an output coupling capacitor
in a single-ended configuration forces the half-supply bias
voltage across the load. This increases internal IC power
dissipation and may cause permanent loudspeaker damage.
POWER DISSIPATION
Whether the power amplifier is bridged or single-ended,
power dissipation is a major concern when designing the
amplifier. Equation 2 states the maximum power dissipation
point for a single-ended amplifier operating at a given supply
voltage and driving a specified load.
P
DMAX =(VDD)
2/(2
π2 R
L): Single-Ended
(2)
However, a direct consequence of the increased power de-
livered to the load by a bridge amplifier is an increase in
internal power dissipation. Equation 3 states the maximum
power dissipation point for a bridge amplifier operating at the
same given conditions.
P
DMAX = 4x(VDD)
2/(2
π2 R
L): Bridge Mode
(3)
The LM4850 is designed to drive either two single-ended
loads simultaneously or one mono bridged-tied load. In SE
mode, the maximum internal power dissipation is 2 times
that of Equation 2. In BTL mode, the maximum internal
power dissipation is the result of Equation 3. Even with this
substantial increase in power dissipation, the LM4850 does
not require heatsinking. The power dissipation from Equation
3 must not be greater than the power dissipation predicted
by Equation 4:
P
DMAX =(TJMAX -TA)/ θJA
(4)
For the package MTC14,
θ
JA = 150C/W, and for the pack-
age MUA10A,
θ
JA
= 194C/W. T
JMAX
= 150C for the
LM4850. Depending on the ambient temperature, T
A,ofthe
surroundings, Equation 4 can be used to find the maximum
internal power dissipation supported by the IC packaging. If
the result of Equation 3 is greater than that of Equation 4,
then either the supply voltage must be decreased, the load
impedance increased, or the ambient temperature reduced.
For the typical application of a 5V power supply, and an 8
bridged load, the maximum ambient temperature possible
without violating the maximum junction temperature is ap-
proximately 55C for package MTC14. This assumes the
device operates at maximum power dissipation and uses
surface mount packaging. Internal power dissipation is a
function of output power. If typical operation is not around the
maximum power dissipation point, operation at higher ambi-
ent temperatures is possible. Refer to the Typical Perfor-
mance Characteristics curves for power dissipation infor-
mation for different output power levels.
POWER SUPPLY BYPASSING
As with any power amplifier, proper supply bypassing is
critical for low noise performance and high power supply
rejection. The capacitor location on both the bypass and
power supply pins should be as close to the device as
possible. The value of the pin bypass capacitor, C
B, directly
affects the LM4850’s half-supply voltage stability and PSRR.
The stability and supply rejection increase as the bypass
capacitor’s value increases Typical applications employ a 5V
regulator with a 10F and a 0.1F bypass capacitors which
aid in supply filtering. This does not eliminate the need for
bypassing the supply nodes of the LM4850. The selection of
bypass capacitors, especially C
B, is thus dependent upon
desired PSRR requirements, click and pop performance,
system cost, and size constraints.
SHUTDOWN FUNCTION
In order to reduce power consumption while not in use, the
LM4850 features amplifier bias circuitry shutdown. This shut-
down function is activated by applying a logic high to the
SHUTDOWN pin. The trigger point is 2.0V minimum for a
logic high level, and 0.8V maximum for a logic low level. It is
best to switch between ground and the supply, V
DD,to
ensure correct shutdown operation. By switching the SHUT-
DOWN pin to V
DD, the LM4850 supply current draw will be
minimized in idle mode. Whereas the device will be disabled
with shutdown voltages less than V
DD, the idle current may
be greater than the typical value of 44A. In either case, the
SHUTDOWN pin should be tied to a fixed voltage to avoid
unwanted state changes.
In many applications, a microcontroller or microprocessor
output is used to control the shutdown circuitry. This provides
a quick, smooth shutdown transition. Another solution is to
use a single-pole, single-throw switch in conjunction with an
external pull-up resistor. When the switch is closed, the
SHUTDOWN pin is connected to ground and enables the
amplifier. If the switch is open, the external pull-up resistor,
R
PU2 will disable the LM4850. This scheme guarantees that
the SHUTDOWN pin will not float, thus preventing unwanted
state changes.
LM4850
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