Application Information (Continued)
The LM4858’s unity-gain stability allows a designer to maxi-
mize system performance. The LM4858’s gain should be set
no higher than necessary for any given application. A low
gain configuration maximizes signal-to-noise performance
and minimizes THD+N. However, a low gain configuration
also requires large input signals to obtain a given output
power. Input signals equal to or greater than 1V
RMS are
available from sources such as audio codecs. Please refer to
the section, Audio Power Amplifier Design, for a more
complete explanation of proper gain selection.
Selecting Input and Output Capacitor Values
Besides gain, one of the major considerations is the closed-
loop bandwidth of the amplifier. To a large extent, the band-
width is dictated by the choice of external components
shown in
Figure 1. The input coupling capacitor C
I and
resistor R
I form a first order high pass filter that limits low
frequency response. C
I’s value should be based on the
desired frequency response weighed against the following:
Large value input and output capacitors are both expensive
and space consuming for portable designs. Clearly a certain
sized capacitor is needed to couple in low frequencies with-
out severe attenuation. But in many cases the speakers
used in portable systems, whether internal or external, have
little ability to reproduce signals below 150Hz. Thus, large
value input and output capacitors may not increase system
performance.
AUDIO POWER AMPLIFIER DESIGN
Design a 1W / 8
Bridged Audio Amplifier
Given:
Power Output:
1W
RMS
Load Impedance
8
Input Level:
1V
RMS
Input Impedance:
20k
Bandwidth:
100Hz - 20kHz ± 0.25dB
A designer must first determine the minimum supply voltage
needed to obtain the specified output power. By extrapolat-
ing from the Output Power vs Supply Voltage graphs in the
Typical Performance Characteristics section, the supply
rail can be easily found. A second way to determine the
minimum supply rail is to calculate the required V
OPEAK
using Equation 5 and add the dropout voltage. This results in
Equation 6, where V
ODTOP and VODBOT are extrapolated
from the Dropout Voltage vs Supply Voltage curve in the
Typical Performance Characteristics section.
(5)
V
DD
≥ (V
OPEAK +(VODTOP +VODBOT))
(6)
Using the Output Power vs Supply Voltage graph for an 8
load, the minimum supply rail is 4.7V. But since 5V is a
standard supply voltage in most applications, it is chosen for
the supply rail. Extra supply voltage creates headroom that
allows the LM4858 to reproduce peaks in excess of 1W
without producing audible distortion. However, the designer
must make sure that the chosen power supply voltage and
output load does not violate the conditions explained in the
Power Dissipation section.
Once the power dissipation equations have been addressed,
the required differential gain can be determined from Equa-
tion 7.
(7)
R
F /RI =AVD / 2
(8)
From Equation 6, the minimum A
VD is 2.83; use AVD =3.
The desired input impedance was 20k
, and with an A
VD of
3, using Equation 8 results in an allocation of R
I = 20k
and
R
F = 30k
.
The final design step is to set the amplifier’s 3dB frequency
bandwidth. To achieve the desired ± 0.25dB pass band
magnitude variation limit, the low frequency response must
extend to at least onefifth the lower bandwidth limit and the
high frequency response must extend o at least five times
the upper bandwidth limit. The variation for both response
limits is 0.17dB, well within the ± 0.25dB desired limit. This
results in:
f
L = 100Hz/5= 20Hz
f
H = 20kHzx5= 100kHz
As stated in the External Components section, R
I in con-
junction with C
I create a highpass filter. Find the coupling
capacitor’s value using Equation 9.
C
I
≥ 1/(2πR
IfL)
(9)
C
I
≥ 1/(2π x 20k x 20Hz) = 0.397F
Use a 0.39F capacitor, the closest standard value.
The high frequency pole is determined by the product of the
desired high frequency pole, f
H, and the differential gain,
A
VD. With AVD = 3 and fH = 100kHz, the resulting GBWP =
150kHz which is much smaller than the LM4858 GBWP of
10MHz. This difference indicates that a designer can still use
the LM4858 at higher differential gains without bandwidth
limitations.
PCB LAYOUT AND SUPPLY REGULATION
CONSIDERATIONS FOR DRIVING 3
AND 4 LOADS
Power dissipated by a load is a function of the voltage swing
across the load and the load’s impedance. As load imped-
ance decreases, load dissipation becomes increasingly de-
pendant on the interconnect (PCB trace and wire) resistance
between the amplifier output pins and the load’s connec-
tions. Residual trace resistance causes a voltage drop,
which results in power dissipated in the trace and not in the
load as desired. For example, 0.1
trace resistance reduces
the output power dissipated by a 4
load from 2.0W to
1.95W. This problem of decreased load dissipation is exac-
erbated as load impedance decreases. Therefore, to main-
tain the highest load dissipation and widest output voltage
swing, PCB traces that connect the output pins to a load
must be as wide as possible.
Poor power supply regulation adversely affects maximum
output power. A poorly regulated supply’s output voltage
LM4858
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