參數(shù)資料
型號(hào): LM4894MMXNPAU
廠商: NATIONAL SEMICONDUCTOR CORP
元件分類: 音頻/視頻放大
英文描述: 1 W, 1 CHANNEL, AUDIO AMPLIFIER, PDSO10
封裝: MSOP-10
文件頁(yè)數(shù): 6/19頁(yè)
文件大小: 770K
代理商: LM4894MMXNPAU
Application Information (Continued)
Tolerance R
F1
R
F2
V
02 -V01
I
LOAD
20%
0.8R
1.2R
-0.500V
62.5mA
10%
0.9R
1.1R
-0.250V
31.25mA
5%
0.95R 1.05R -0.125V
15.63mA
1%
0.99R 1.01R -0.025V
3.125mA
0%
RR0
0
Similar results would occur if the input resistors were not
carefully matched. Adding input coupling capacitors in be-
tween the signal source and the input resistors will eliminate
this problem, however, to achieve best performance with
minimum component count it is highly recommended that
both the feedback and input resistors matched to 1% toler-
ance or better.
AUDIO POWER AMPLIFIER DESIGN
Design a 1W/8
Audio Amplifier
Given:
Power Output
1Wrms
Load Impedance
8
Input Level
1Vrms
Input Impedance
20k
Bandwidth
–20kHz ± 0.25dB
A designer must first determine the minimum supply rail to
obtain the specified output power. The supply rail can easily
be found by extrapolating from the Output Power vs Supply
Voltage graphs in the Typical Performance Characteris-
tics section. A second way to determine the minimum supply
rail is to calculate the required VOPEAK using Equation 7
and add the dropout voltages. Using this method, the mini-
mum supply voltage is (Vopeak +(V
DO TOP+(VDO BOT )),
where V
DO BOT and VDO TOP are extrapolated from the
Dropout Voltage vs Supply Voltage curve in the Typical
Performance Characteristics section.
(7)
Using the Output Power vs Supply Voltage graph for an 8W
load, the minimum supply rail just about 5V. Extra supply
voltage creates headroom that allows the LM4894 to repro-
duce peaks in excess of 1W without producing audible dis-
tortion. At this time, the designer must make sure that the
power supply choice along with the output impedance does
not violate the conditions explained in the Power Dissipa-
tion section. Once the power dissipation equations have
been addressed, the required differential gain can be deter-
mined from Equation 7.
(8)
R
f /Ri =AVD
From Equation 7, the minimum A
VD is 2.83. Since the de-
sired input impedance was 20k
, a ratio of 2.83:1 of R
f to Ri
results in an allocation of R
i = 20k
for both input resistors
and R
f= 60k
for both feedback resistors. The final design
step is to address the bandwidth requirement which must be
stated as a single -3dB frequency point. Five times away
from a -3dB point is 0.17dB down from passband response
which is better than the required ±0.25dB specified.
f
H = 20kHz * 5 =100kHz
The high frequency pole is determined by the product of the
desired frequency pole, f
H , and the differential gain, AVD .
With a A
VD = 2.83 and fH = 100kHz, the resulting GBWP =
150kHz which is much smaller than the LM4894 GBWP of
10MHz. This figure displays that if a designer has a need to
design an amplifier with a higher differential gain, the
LM4894 can still be used without running into bandwidth
limitations.
LM4894
www.national.com
14
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