參數(shù)資料
型號(hào): LM75BD
廠(chǎng)商: NXP Semiconductors N.V.
元件分類(lèi): 溫度/濕度傳感器
英文描述: Digital temperature sensor and thermal watchdog
封裝: LM75BD<SOT96-1 (SO8)|<<http://www.nxp.com/packages/SOT96-1.html<1<Always Pb-free,;LM75BD<SOT96-1 (SO8)|<<http://www.nxp.com/packages/SOT96-1.html<1<Always Pb-free,;
文件頁(yè)數(shù): 10/29頁(yè)
文件大?。?/td> 164K
代理商: LM75BD
LM75B_2
NXP B.V. 2008. All rights reserved.
Product data sheet
Rev. 02 — 9 December 2008
10 of 29
NXP Semiconductors
LM75B
Digital temperature sensor and thermal watchdog
7.5 OS output and polarity
The OS output is an open-drain output and its state represents results of the device
watchdog operation as described in
Section 7.1
. In order to observe this output state, an
external pull-up resistor is needed. The resistor should be as large as possible, up to
200 k
, to minimize the Temp reading error due to internal heating by the high OS sinking
current.
The OS output active state can be selected as HIGH or LOW by programming bit B2
(OS_POL) of register Conf: setting bit OS_POL to logic 1 selects OS active HIGH and
setting bit B2 to logic 0 sets OS active LOW. At power-up, bit OS_POL is equal to logic 0
and the OS active state is LOW.
7.6 OS comparator and interrupt modes
As described in
Section 7.1
, the device OS output responds to the result of the
comparison between register Temp data and the programmed limits, in registers Tos and
Thyst, in different ways depending on the selected OS mode: OS comparator or
OS interrupt. The OS mode is selected by programming bit B1 (OS_COMP_INT) of
register Conf: setting bit OS_COMP_INT to logic 1 selects the OS interrupt mode, and
setting to logic 0 selects the OS comparator mode. At power-up, bit OS_COMP_INT is
equal to logic 0 and the OS comparator is selected.
The main difference between the two modes is that in OS comparator mode, the OS
output becomes active when Temp has exceeded T
th(ots)
and reset when Temp has
dropped below T
hys
, reading a register or putting the device into shutdown mode does not
change the state of the OS output; while in OS interrupt mode, once it has been activated
either by exceeding T
th(ots)
or dropping below T
hys
, the OS output will remain active
indefinitely until reading a register, then the OS output is reset.
Temperature limits T
th(ots)
and T
hys
must be selected so that T
th(ots)
> T
hys
. Otherwise, the
OS output state will be undefined.
Table 12.
11-bit binary
(2’s complement)
0 1111 1010
0 0011 0010
0 0000 0001
0 0000 0000
1 1111 1111
1 1100 1110
1 1001 0010
Tos and Thyst limit data and value
Hexadecimal value
Decimal value
Value
0FA
032
001
000
1FF
1CE
192
250
50
1
0
1
50
110
+125.0
°
C
+25.0
°
C
+0.5
°
C
0.0
°
C
0.5
°
C
25.0
°
C
55.0
°
C
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