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參數(shù)資料
| 型號： | LM84CIMQA |
| 廠商： | National Semiconductor Corporation |
| 元件分類： | 溫度/濕度傳感器 |
| 英文描述： | Diode Input Digital Temperature Sensor with Two-Wire Interface |
| 中文描述： | 二極管輸入數(shù)字溫度傳感器兩線接口 |
| 文件頁數(shù)： | 6/16頁 |
| 文件大?。?/td> | 168K |
| 代理商： | LM84CIMQA |
Logic Electrical Characteristics
(Continued)
SMBus DIGITAL SWITCHING CHARACTERISTICS
Unless otherwise noted, these specifications apply for V
CC
=+3.0 Vdc to +3.6 Vdc, C
(load capacitance) on output lines = 80
pF.
Boldface limits apply for T
= T
= T
to T
;
= T
= +25C, unless otherwise noted.
The switching characteristics of the LM84 fully meet or exceed the published specifications of the SMBus or I
2
C bus. The fol-
lowing parameters are the timing relationships between SMBCLK and SMBData signals related to the LM84. They are not nec-
essarily the I
2
C or SMBus bus specifications.
Symbol
Parameter
Conditions
Typical
(Note 6)
Limits
(Note 7)
400
10
1.3
25
25
0.6
Units
(Limit)
kHz (max)
kHz (min)
μs (min)
ms (max)
ms (max)
μs (min)
μs
μs
ns (max)
f
SMB
SMBus Clock Frequency
t
LOW
SMBus Clock Low Time
10% to 10%
t
LOW
SEXT
t
HIGH
t
R;SMB
t
F;SMB
t
OF
Cumulative Clock Low Extend Time
SMBus Clock High Time
SMBus Rise Time
SMBus Fall Time
Output Fall Time
90% to 90%
10% to 90%
90% to 10%
C
L
= 400 pF
I
O
= 3 mA
1
0.3
250
t
TIMEOUT
SMBData and SMBCLK Time Low for
Reset of Serial Interface (Note 13)
SMBCLK (Clock) Period
Data In Setup Time to SMBCLK High
25
40
2.5
100
ms (min)
ms (max)
μs (min)
ns (min)
t
1
t
2
,
t
SU;DAT
t
3
,
t
HD;DAT
t
4
,
t
HD;STA
t
5
,
t
SU;STO
t
6
,
t
SU;STA
t
BUF
Data Out Stable after SMBCLK Low
0
0.9
100
ns (min)
μs (max)
ns (min)
SMBData Low Setup Time to SMBCLK
Low
SMBData High Delay Time after
SMBCLK High (Stop Condition Setup)
SMBus Start-Condition Setup Time
100
ns (min)
0.6
μs (min)
SMBus Free Time
1.3
μs (min)
SMBus Communication
DS100961-4
L
www.national.com
6
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