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Applications Information
1.0 OVERVIEW
The LM9832 is a USB, 1200dpi, 14 bit (42 bit color) scanner-on-
a-chip. The LM9832 supersedes the LM9831, providing all of the
LM9831’s functionality while improving performance and adding
several new features. See
12.0 CHANGES FROM THE LM9831
for a complete list of additions and enhancements.
2.0 ANALOG SIGNAL PROCESSING
One channel of the LM9832’s analog front end is shown in Figure
3. The gain through each channel can be set between 0.93V/V
and 9.0V/V using registers 3B, 3C, and 3D. The offset DAC pro-
vides up to ±278mV of offset correction using registers 38, 39,
and 3A. The offset DAC and gain stages should be adjusted dur-
ing coarse calibration so that the input signal is a maximum of
1.9Vp-p at the ADC input.
3.0 DIGITAL SIGNAL PROCESSING
3.1 ADC
The digital pixel data comes from a 6MHz 14 bit pipelined ADC.
The output data is formatted as a 16 bit word. The pixel data is in
the upper 14 bits, and the lower two bits are set to 0.
3.2 Pixel Processing Block
The Pixel Processing stage is used to digitally reduce the optical
resolution of the sensor. The optical resolution can be reduced by
a factor of 1, 1.5, 2, 3, 4, 6, 8, or 12. For a 1200 dpi (optical) sys-
tem, this would produce resolutions of 1200, 800, 600, 400, 300,
200, 150, and 100. A 600 dpi (optical) system would be capable
of 600, 400, 300, 200, 150, 100, 75, and 50 dpi. (Resolution in the
vertical direction is controlled by the stepper motor speed.)
Horizontal resolution reduction is accomplished by averaging
adjacent pixels. Averaging produces better image quality and
reduces aliasing versus the traditional technique of simply dis-
carding pixels to reduce resolution. For example, to get 100 dpi
from a 300dpi optical sensor, you would average 3 300dpi pixels:
The number of pixels coming out of the Pixel Processing block is
equal to the integer portion of the number of pixels going in to the
Pixel Processing block divided by the “Divide By” setting, from the
table shown in Figure 4.
This equation also applies to the divide by 1.5 function.
If there are not enough pixels at the end of a line to form a com-
plete pixel, the last pixel will be eliminated. For example, if a line
is 35 pixels wide and the Horizontal DPI setting is set to divide by
6, then the output of the Pixel Processing block will be 5 pixels
(the integer portion of 35/6). The last 5 pixels will be discarded,
since 6 pixels would be required to form a new pixel in this mode.
The output of this stage is sent to the Pixel Rate Offset Correction
Block.
3.3 Pixel Rate Offset Correction Block
Offset correction words for every pixel of the CCD are stored in
Figure 3: Analog Front End (AFE) Model
V
DAC
DAC
Offset
G
PGA
Σ
+
+
14 Bit
ADC
+
+
+
+
V
OS3
V
OS2
Σ
Σ
D
OUT
G
B
+
+
V
OS1
V
IN
Σ
Gain Boost
1V/V or
3V/V
PGA
0.93V/V to
3V/V
D
OUT
= (((V
IN
+ V
OS1
)G
B
+ V
DAC
+ V
OS2
)G
PGA
+ V
OS3
)C
simplified, with all offsets = 0, this is:
D
OUT
= (V
IN
G
B
+ V
DAC
)G
PGA
C
C is a constant that combines the gain error through the AFE, reference voltage variance, and analog voltage
to digital code conversion into one constant. Ideally, C = 8192 codes/V (16384codes/1.9V).
Manufacturing tolerances widen the range of C. See Electrical Specifications.
Divide
By
DPI
(1200
DPI
system)
1200
800
600
400
300
200
150
100
DPI
(800
DPI
system)
800
533
400
267
200
133
100
67
DPI
(600
DPI
system)
600
400
300
200
150
100
75
50
DPI
(300
DPI
system)
300
200
150
100
75
50
37.5
25
1
1.5
2
3
4
6
8
12
Figure 4:
Decreasing Horizontal Resolution
pixel100dpi
pn-2
pn-1
3
pn
+
+
=
PixelsOUT
INT
Divide By
=
L