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參數(shù)資料
| 型號： | LMC6484IN/NOPB |
| 廠商： | National Semiconductor |
| 文件頁數(shù)： | 4/24頁 |
| 文件大?。?/td> | 0K |
| 描述： | IC OP AMP QUAD CMOS R-R 14-DIP |
| 標(biāo)準(zhǔn)包裝： | 25 |
| 放大器類型： | 通用 |
| 電路數(shù)： | 4 |
| 輸出類型： | 滿擺幅 |
| 轉(zhuǎn)換速率： | 1.3 V/µs |
| 增益帶寬積： | 1.5MHz |
| 電流 - 輸入偏壓： | 0.02pA |
| 電壓 - 輸入偏移： | 110µV |
| 電流 - 電源： | 2.6mA |
| 電流 - 輸出 / 通道： | 30mA |
| 電壓 - 電源，單路/雙路(±)： | 3 V ~ 15.5 V，±1.5 V ~ 7.75 V |
| 工作溫度： | -40°C ~ 85°C |
| 安裝類型： | 通孔 |
| 封裝/外殼： | 14-DIP（0.300"，7.62mm） |
| 供應(yīng)商設(shè)備封裝： | 14-DIP |
| 包裝： | 管件 |
| 產(chǎn)品目錄頁面： | 1266 (CN2011-ZH PDF) |
| 其它名稱： | *LMC6484IN *LMC6484IN/NOPB LMC6484IN |
Typical Performance Characteristics V
S = +15V, Single Supply, TA = 25C unless otherwise
specified (Continued)
Application Information
1.0 Amplifier Topology
The
LMC6484
incorporates
specially
designed
wide-compliance range current mirrors and the body effect to
extend input common mode range to each supply rail.
Complementary paralleled differential input stages, like the
type used in other CMOS and bipolar rail-to-rail input ampli-
fiers, were not used because of their inherent accuracy
problems
due
to
CMRR,
cross-over
distortion,
and
open-loop gain variation.
The LMC6484’s input stage design is complemented by an
output stage capable of rail-to-rail output swing even when
driving a large load. Rail-to-rail output swing is obtained by
taking the output directly from the internal integrator instead
of an output buffer stage.
2.0 Input Common-Mode Voltage Range
Unlike Bi-FET amplifier designs, the LMC6484 does not
exhibit phase inversion when an input voltage exceeds the
negative supply voltage.
Figure 1 shows an input voltage
exceeding both supplies with no resulting phase inversion on
the output.
The absolute maximum input voltage is 300 mV beyond
either supply rail at room temperature. Voltages greatly ex-
ceeding this absolute maximum rating, as in
Figure 2, can
cause excessive current to flow in or out of the input pins
possibly affecting reliability.
Applications that exceed this rating must externally limit the
maximum input current to ±5 mA with an input resistor as
shown in
Figure 3.
3.0 Rail-To-Rail Output
The approximated output resistance of the LMC6484 is
180
sourcing and 130 sinking at V
S = 3V and 110
sourcing and 83
sinking at V
S = 5V. Using the calculated
output resistance, maximum output voltage swing can be
estimated as a function of load.
4.0 Capacitive Load Tolerance
The LMC6484 can typically directly drive a 100 pF load with
V
S = 15V at unity gain without oscillating. The unity gain
follower is the most sensitive configuration. Direct capacitive
Stability vs
Capacitive Load
DS011714-89
Stability vs
Capacitive Load
DS011714-90
DS011714-10
FIGURE 1. An Input Voltage Signal Exceeds the
LMC6484 Power Supply Voltages with
No Output Phase Inversion
DS011714-12
FIGURE 2. A ±7.5V Input Signal Greatly
Exceeds the 3V Supply in
Figure 3 Causing
No Phase Inversion Due to R
I
DS011714-11
FIGURE 3. R
I Input Current Protection for
Voltages Exceeding the Supply Voltage
LMC6484
www.national.com
11
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