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參數(shù)資料
| 型號： | LMU8UJC35 |
| 廠商： | LOGIC DEVICES INC |
| 元件分類： | 數(shù)字信號處理外設(shè) |
| 英文描述： | 8 x 8-bit Parallel Multiplier |
| 中文描述： | 8-BIT, DSP-MULTIPLIER, PQCC44 |
| 封裝： | PLASTIC, LCC-44 |
| 文件頁數(shù)： | 1/7頁 |
| 文件大?。?/td> | 176K |
| 代理商： | LMU8UJC35 |
DEVICES INCORPORATED
LMU08/8U
8 x 8-bit Parallel Multiplier
8 x 8-bit Parallel Multiplier
Multipliers
08/16/2000–LDS.08/8U-R
1
K
20 ns Worst-Case Multiply Time
K
Low Power CMOS Technology
K
LMU08 Replaces TRW TMC208K
K
LMU8U Replaces TRW TMC28KU
K
Two’s Complement (LMU08), or
Unsigned Operands (LMU8U)
K
Three-State Outputs
K
Package Styles Available:
40-pin PDIP
44-pin PLCC, J-Lead
FEATURES
DESCRIPTION
DEVICES INCORPORATED
The
LMU08
and
LMU8U
are high-
speed, low power 8-bit parallel
multipliers. They are pin-for-pin
equivalents with TRW
TMC208K
and
TMC28KU
type multipliers. Full
military ambient temperature range
operation is attained by the use of
advanced CMOS technology.
Both the LMU08 and the LMU8U
produce the 16-bit product of two
8-bit numbers. The LMU08 accepts
operands in two’s complement format,
and produces a two’s complement
result. The product is provided in two
halves with the sign bit replicated as
the most significant bit of both halves.
This facilitates use of the LMU08
product as a double precision operand
in 8-bit systems. The LMU8U oper-
ates on unsigned data, producing an
unsigned magnitude result.
Both the LMU08 and the LMU8U
feature independently controlled
registers for both inputs and the
product, which along with three-state
outputs allows easy interfacing with
microprocessor busses. Provision is
made in the LMU08 and LMU8U for
proper rounding of the product to
8-bit precision. The round input is
loaded at the rising edge of the logical
OR of CLK A and CLK B for the
LMU08. The LMU8U latches RND on
the rising edge of CLK A only. In
either case, a ‘1’ is added in the most
significant position of the lower
product byte when RND is asserted.
Subsequent truncation of the least
significant product byte results in a
correctly rounded 8-bit result.
LMU08/8U B
LOCK
D
IAGRAM
R
CLK A
CLK B
RND
CLK R
LMU08 Only
8
8
16
8
8
OEM
R
7-0
A
7-0
R
15-8
A REGISTER
B REGISTER
B
7-0
RESULT
REGISTER
OEL
8
8
相關(guān)PDF資料 |
PDF描述 |
|---|---|
| LMU8UJC50 | 8 x 8-bit Parallel Multiplier |
| LMU8UPC35 | 8 x 8-bit Parallel Multiplier |
| LMU8UPC50 | 8 x 8-bit Parallel Multiplier |
| LN80C54 | CHMOS SINGLE-CHIP 8-BIT MICROCONTROLLER |
| LN80C58 | CHMOS SINGLE-CHIP 8-BIT MICROCONTROLLER |
相關(guān)代理商/技術(shù)參數(shù) |
參數(shù)描述 |
|---|---|
| LMU8UJC50 | 制造商:LOGIC 制造商全稱:LOGIC 功能描述:8 x 8-bit Parallel Multiplier |
| LMU8UJC70 | 制造商:未知廠家 制造商全稱:未知廠家 功能描述:Multiplier |
| LMU8UKC35 | 制造商:未知廠家 制造商全稱:未知廠家 功能描述:Multiplier |
| LMU8UKC50 | 制造商:未知廠家 制造商全稱:未知廠家 功能描述:Multiplier |
| LMU8UKC70 | 制造商:未知廠家 制造商全稱:未知廠家 功能描述:Multiplier |
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