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參數(shù)資料
| 型號(hào)： | LMV844MT |
| 廠商： | NATIONAL SEMICONDUCTOR CORP |
| 元件分類： | 運(yùn)動(dòng)控制電子 |
| 英文描述： | CMOS Input, RRIO, Wide Supply Range Operational Amplifiers |
| 中文描述： | QUAD OP-AMP, 800 uV OFFSET-MAX, 4.5 MHz BAND WIDTH, PDSO14 |
| 封裝： | TSSOP-14 |
| 文件頁(yè)數(shù)： | 12/18頁(yè) |
| 文件大?。?/td> | 419K |
| 代理商： | LMV844MT |
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Application Information
INTRODUCTION
The LMV841 and LMV844 are operational amplifiers with
near-precision specifications: low noise, low temperature
drift, low offset and rail-to-rail input and output.
The low supply current, a temperature range of 40°C to
125°C, the 12V supply with CMOS input and the small SC70
package make this a unique op amp family.
Possible applications are instrumentation, medical, test
equipment, audio and automotive applications.
The small SC70 package for the LMV841, and the low supply
current per amplifier, 1 mA, make the LMV841/LMV844 per-
fect choices for portable electronics.
INPUT PROTECTION
The LMV841/LMV844 have a set of anti-parallel diodes D
1
and D
between the input pins, as shown in
Figure 1
. These
diodes are present to protect the input stage of the amplifier.
At the same time, they limit the amount of differential input
voltage that is allowed on the input pins.
A differential signal larger than one diode voltage drop can
damage the diodes. The differential signal between the inputs
needs to be limited to ±300 mV or the input current needs to
be limited to ±10 mA.
Note that when the op amp is slewing, a differential input volt-
age exists that forward biases the protection diodes. This may
result in current being drawn from the signal source. While
this current is already limited by the internal resistors R
and
R
2
(both 130
Ω
), a resistor of 1 k
Ω
can be placed in the feed-
back path, or a 500
Ω
resistor can be placed in series with the
input signal for further limitation.
20168351
FIGURE 1. Protection Diodes between the Input Pins
INPUT STAGE
The input stage of this amplifier consists of a PMOS and an
NMOS input pair to achieve a more than rail-to-rail input
range.
For input voltages close to the negative rail, only the PMOS
pair is active. Close to the positive rail, only the NMOS pair is
active.
For intermediate signals, the transition from PMOS pair to
NMOS pair will result in a very small offset shift, which ap-
pears at approximately 1V from the positive rail.
To reduce this small offset shift, the amplifier is trimmed dur-
ing production, resulting in an input offset voltage of less then
0.5 mV at room temperature over the total input range.
CAPACITIVE LOAD
The LMV841/LMV844 can be connected as non-inverting uni-
ty-gain amplifiers. This configuration is the most sensitive to
capacitive loading.
The combination of a capacitive load placed on the output of
an amplifier along with the amplifier’s output impedance cre-
ates a phase lag, which reduces the phase margin of the
amplifier. If the phase margin is significantly reduced, the re-
sponse will be underdamped which causes peaking in the
transfer and when there is too much peaking the op amp might
start oscillating.
In order to drive heavier capacitive loads, an isolation resistor,
R
ISO
, should be used, as shown in
Figure 2
. By using this
isolation resistor, the capacitive load is isolated from the
amplifier’s output, and hence, the pole caused by C
L
is no
longer in the feedback loop. The larger the value of R
ISO
, the
more stable the output voltage will be. If values of R
are
sufficiently large, the feedback loop will be stable, indepen-
dent of the value of C
. However, larger values of R
result
in reduced output swing and reduced output current drive.
20168350
FIGURE 2. Isolating Capacitive Load
REDUCING OVERSHOOT
When the output of the op amp is at its lower swing limit (i.e.
saturated near V
), rapidly rising signals can cause some
overshoot.
This overshoot can be reduced by adding a resistor from the
output to V
+
. Even in extreme situations at high temperatures,
a 10k resistor is sufficient to reduce the overshoot to negligible
levels.
The resistor at the output will however reduce the maximum
output swing, as would any resistive load at the output.
DECOUPLING AND LAYOUT
Care must be given when creating the board layout for the op
amp.
For decoupling the supply lines it is suggested that 10 nF ca-
pacitors be placed as close as possible to the op amp.
For single supply, place a capacitor between V
+
and V
. For
dual supplies, place one capacitor between V
+
and the board
ground, and the second capacitor between ground and V
.
NOISE DUE TO RESISTORS
The LMV841/LMV844 have good noise specifications, and
will frequently be used in low-noise applications. Therefore it
is important to take into account the influence of the resistors
on the total noise contribution.
For applications with a voltage input configuration it is, in gen-
eral, beneficial to keep the resistor values low. In these con-
figurations high resistor values mean high noise levels.
www.national.com
12
L
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相關(guān)代理商/技術(shù)參數(shù) |
參數(shù)描述 |
|---|---|
| LMV844MT/NOPB | 功能描述:運(yùn)算放大器 - 運(yùn)放 RoHS:否 制造商:STMicroelectronics 通道數(shù)量:4 共模抑制比（最小值）:63 dB 輸入補(bǔ)償電壓:1 mV 輸入偏流（最大值）:10 pA 工作電源電壓:2.7 V to 5.5 V 安裝風(fēng)格:SMD/SMT 封裝 / 箱體:QFN-16 轉(zhuǎn)換速度:0.89 V/us 關(guān)閉:No 輸出電流:55 mA 最大工作溫度:+ 125 C 封裝:Reel |
| LMV844MTX | 制造商:Texas Instruments 功能描述:OP Amp Quad GP R-R I/O 12V 14-Pin TSSOP T/R |
| LMV844MTX/NOPB | 功能描述:運(yùn)算放大器 - 運(yùn)放 RoHS:否 制造商:STMicroelectronics 通道數(shù)量:4 共模抑制比（最小值）:63 dB 輸入補(bǔ)償電壓:1 mV 輸入偏流（最大值）:10 pA 工作電源電壓:2.7 V to 5.5 V 安裝風(fēng)格:SMD/SMT 封裝 / 箱體:QFN-16 轉(zhuǎn)換速度:0.89 V/us 關(guān)閉:No 輸出電流:55 mA 最大工作溫度:+ 125 C 封裝:Reel |
| LMV844Q | 制造商:NSC 制造商全稱:National Semiconductor 功能描述:CMOS Input, RRIO, Wide Supply Range Operational Amplifiers |
| LMV844QMA | 制造商:NSC 制造商全稱:National Semiconductor 功能描述:CMOS Input, RRIO, Wide Supply Range Operational Amplifiers |
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