- 您現(xiàn)在的位置：買賣IC網(wǎng) > PDF目錄384604 > LMX2485SQX (NATIONAL SEMICONDUCTOR CORP) 50 MHz - 3.0 GHz High Performance Delta-Sigma Low Power Dual PLLatinum⑩ Frequency Synthesizers with 800 MHz Integer PLL PDF資料下載
參數(shù)資料
| 型號(hào)： | LMX2485SQX |
| 廠商： | NATIONAL SEMICONDUCTOR CORP |
| 元件分類： | XO, clock |
| 英文描述： | 50 MHz - 3.0 GHz High Performance Delta-Sigma Low Power Dual PLLatinum⑩ Frequency Synthesizers with 800 MHz Integer PLL |
| 中文描述： | PLL FREQUENCY SYNTHESIZER, 3000 MHz, PQCC24 |
| 封裝： | 4 X 4 MM, 0.8 MM, PLASTIC, LLP-24 |
| 文件頁數(shù)： | 36/37頁 |
| 文件大小： | 861K |
| 代理商： | LMX2485SQX |
第1頁第2頁第3頁第4頁第5頁第6頁第7頁第8頁第9頁第10頁第11頁第12頁第13頁第14頁第15頁第16頁第17頁第18頁第19頁第20頁第21頁第22頁第23頁第24頁第25頁第26頁第27頁第28頁第29頁第30頁第31頁第32頁第33頁第34頁第35頁當(dāng)前第36頁第37頁
Programming Description
(Continued)
2.8 R7 REGISTER
REGISTER 23 22 21 20 19 18 17 16 15 14
13
12 11 10 9 8
Data[19:0]
1
7
6
5
4
3
2
1
0
C3 C2 C1 C0
1
1
R7
0
0
0
0
0
0
0
0
0
0 DIV4 0
0 0 0 IF_RST RF_RST IF_CPT RF_CPT
1
1
2.8.1 DIV4 -- RF Digital Lock Detect Divide By 4
Because the digital lock detect function is based on a phase error, it becomes more difficult to detect a locked condition for larger
comparison frequencies. When this bit is enabled, it subdivides the RF PLL comparison frequency (it does not apply to the IF
comparison frequency) presented to the digital lock detect circuitry by 4. This enables this circuitry to work at higher comparison
frequencies. It is recommended that this bit be enabled whenever the comparison frequency exceeds 20 MHz and RF digital lock
detect is being used.
2.8.2 IF_RST -- IF PLL Counter Reset
When this bit is enabled, the IF PLL N and R counters are reset, and the charge pump is put in a Tri-State condition. This feature
should be disabled for normal operation. Note that a counter reset is applied whenever the chip is powered up via software or CE
pin.
IF_RST
0 (Default)
1
IF PLL N and R Counters
Normal Operation
Counter Reset
IF PLL Charge Pump
Normal Operation
Tri-State
2.8.3 RF_RST -- RF PLL Counter Reset
When this bit is enabled, the RF PLL N and R counters are reset and the charge pump is put in a Tri-State condition. This feature
should be disabled for normal operation. This feature should be disabled for normal operation. Note that a counter reset is applied
whenever the chip is powered up via software or CE pin.
RF_RST
0 (Default)
1
RF PLL N and R Counters
Normal Operation
Counter Reset
RF PLL Charge Pump
Normal Operation
Tri-State
2.8.4 RF_TRI -- RF Charge Pump Tri-State
When this bit is enabled, the RF PLL charge pump is put in a Tri-State condition, but the counters are not reset. This feature is
typically disabled for normal operation.
RF_TRI
0 (Default)
1
RF PLL N and R Counters
Normal Operation
Normal Operation
RF PLL Charge Pump
Normal Operation
Tri-State
2.8.5 IF_TRI -- IF Charge Pump Tri-State
When this bit is enabled, the IF PLL charge pump is put in a Tri-State condition, but the counters are not reset. This feature is
typically disabled for normal operation.
IF_TRI
0 (Default)
1
IF PLL N and R Counters
Normal Operation
Normal Operation
IF PLL Charge Pump
Normal Operation
Tri-State
L
www.national.com
36
相關(guān)PDF資料 |
PDF描述 |
|---|---|
| LMX2487 | 3.0 GHz - 6.0 GHz High Performance Delta-Sigma Low Power Dual PLLatinum⑩ Frequency Synthesizers with 3.0 GHz Integer PLL |
| LMX2487SQ | 3.0 GHz - 6.0 GHz High Performance Delta-Sigma Low Power Dual PLLatinum⑩ Frequency Synthesizers with 3.0 GHz Integer PLL |
| LMX2487SQX | 3.0 GHz - 6.0 GHz High Performance Delta-Sigma Low Power Dual PLLatinum⑩ Frequency Synthesizers with 3.0 GHz Integer PLL |
| LMX3161 | Single Chip Radio Transceiver(單芯片無線電收發(fā)器) |
| LMX3161VBH | Single Chip Radio Transceiver |
相關(guān)代理商/技術(shù)參數(shù) |
參數(shù)描述 |
|---|---|
| LMX2485SQX/NOPB | 功能描述:鎖相環(huán) - PLL RoHS:否 制造商:Silicon Labs 類型:PLL Clock Multiplier 電路數(shù)量:1 最大輸入頻率:710 MHz 最小輸入頻率:0.002 MHz 輸出頻率范圍:0.002 MHz to 808 MHz 電源電壓-最大:3.63 V 電源電壓-最小:1.71 V 最大工作溫度:+ 85 C 最小工作溫度:- 40 C 封裝 / 箱體:QFN-36 封裝:Tray |
| LMX2486 | 制造商:NSC 制造商全稱:National Semiconductor 功能描述:1.0 GHz - 4.5 GHz High Performance Delta-Sigma Low Power Dual PLLatinum TM Frequency Synthesizers with 3.0 GHz Integer PLL |
| LMX2486EVAL | 功能描述:時(shí)鐘和定時(shí)器開發(fā)工具 LMX2486 EVAL BOARD RoHS:否 制造商:Texas Instruments 產(chǎn)品:Evaluation Modules 類型:Clock Conditioners 工具用于評(píng)估:LMK04100B 頻率:122.8 MHz 工作電源電壓:3.3 V |
| LMX2486SQ | 制造商:Texas Instruments 功能描述:PLL Frequency Synthesizer Dual 5MHz to 4500MHz 24-Pin LLP EP T/R |
| LMX2486SQ/NOPB | 功能描述:鎖相環(huán) - PLL RoHS:否 制造商:Silicon Labs 類型:PLL Clock Multiplier 電路數(shù)量:1 最大輸入頻率:710 MHz 最小輸入頻率:0.002 MHz 輸出頻率范圍:0.002 MHz to 808 MHz 電源電壓-最大:3.63 V 電源電壓-最小:1.71 V 最大工作溫度:+ 85 C 最小工作溫度:- 40 C 封裝 / 箱體:QFN-36 封裝:Tray |
發(fā)布緊急采購，3分鐘左右您將得到回復(fù)。