參數(shù)資料
型號: LMZ10505EXTTZ
廠商: NATIONAL SEMICONDUCTOR CORP
元件分類: 穩(wěn)壓器
英文描述: 8.7 A SWITCHING REGULATOR, 1160 kHz SWITCHING FREQ-MAX, PSSO7
封裝: 10.16 X 13.77 MM, 4.57 MM HEIGHT, ROHS COMPLIANT, TO-PMOD, 7 PIN
文件頁數(shù): 22/22頁
文件大?。?/td> 1387K
代理商: LMZ10505EXTTZ
A second criteria before finalizing the C
in bypass capacitor is
the RMS current capability. The necessary RMS current rat-
ing of the input capacitor to a buck regulator can be estimated
by
With this high AC current present in the input capacitor, the
RMS current rating becomes an important parameter. The
maximum input capacitor ripple voltage and RMS current oc-
cur at 50% duty cycle. Select an input capacitor rated for at
least the maximum calculated I
Cin(RMS).
Additional bulk capacitance with higher ESR may be required
to damp any resonance effects of the input capacitance and
parasitic inductance.
Output Capacitor Selection
In general, 22 F to 100 F high quality dielectric (X5R, X7R)
ceramic capacitor rated at twice the maximum output voltage
is sufficient given the optimal high frequency characteristics
and low ESR of ceramic dielectrics. Although, the output ca-
pacitor can also be of electrolytic chemistry for increased
capacitance density.
Two output capacitance equations are required to determine
the minimum output capacitance. One equation determines
the output capacitance (C
O) based on PWM ripple voltage.
The second equation determines C
O based on the load tran-
sient characteristics. Select the largest capacitance value of
the two.
The minimum capacitance, given the maximum output volt-
age ripple (
ΔV
OUT) requirement, is determined by the follow-
ing equation:
Where the peak to peak inductor current ripple (
Δi
L) is equal
to:
R
ESR is the total output capacitor ESR, L is the inductance
value of the internal power inductor, where L = 1.5 H, and
f
SW = 1 MHz. Therefore, per the design example:
The minimum output capacitance requirement due to the
PWM ripple voltage is:
Three miliohms is a typical R
ESR value for ceramic capacitors.
The following equation provides a good first pass capacitance
requirement for a load transient:
Where I
step is the peak to peak load step (10% to 90% of the
maximum load for this example), V
FB = 0.8V, and ΔVo_tran is
the maximum output voltage deviation, which is ±20 mV.
Therefore the capacitance requirement for the given design
parameters is:
In this particular design the output capacitance is determined
by the load transient requirements.
Table 1 lists some examples of commercially available ca-
pacitors that can be used with the LMZ10505EXT.
9
www.national.com
LMZ10505EXT
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