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參數(shù)資料
| 型號(hào)： | LNBP21PD |
| 廠商： | 意法半導(dǎo)體 |
| 英文描述： | LNBP SUPPLY AND CONTROL IC WITH STEP-UP CONVERTER AND I2C INTERFACE |
| 中文描述： | LNBP電源和控制集成電路升壓轉(zhuǎn)換器和I2C接口 |
| 文件頁數(shù)： | 5/20頁 |
| 文件大小： | 693K |
| 代理商： | LNBP21PD |
LNBP21
5/20
TYPICAL APPLICATION CIRCUIT
(*) Set to GND if not used
(**) filter to be used according to EUTELSAT reccomendation to implement the DiSEqC
TM
2.x, not needed if bidirectional DiSEqC
TM
2.x is
not implemented (see DiSEqC implementation note)
(***) IC2 is a ST Fettky, STS4DNFS30L, that includes both the schottky diode and the N-Channel Mos-Fet, needed for the DC/DC converter,
in a So-8 package. It can be replaced by a schottky diode (STPS2L3A or similar) and a N-Channel Mos-Fet (STN4NF03L or similar)
I
2
C BUS INTERFACE
Data transmission from main μP to the LNBP21
and viceversa takes place through the 2 wires I2C
bus interface, consisting of the two lines SDA and
SCL (pull-up resistors to positive supply voltage
must be externally connected).
DATA VALIDITY
As shown in fig. 1, the data on the SDA line must
be stable during the high period of the clock. The
HIGH and LOW state of the data line can only
change when the clock signal on the SCL line is
LOW.
START AND STOP CONDITIONS
As shown in fig.2 a start condition is a HIGH to
LOW transition of the SDA line while SCL is HIGH.
The stop condition is a LOW to HIGH transition of
the SDA line while SCL is HIGH. A STOP
condi-tions must be sent before each START
condition.
BYTE FORMAT
Every byte transferred to the SDA line must
contain 8 bits. Each byte must be followed by an
ac-knowledge bit. The MSB is transferred first.
ACKNOWLEDGE
The master (μP) puts a resistive HIGH level on the
SDA line during the acknowledge clock pulse (see
fig.
3).
The
peripheral
acknowledges has to pull-down (LOW) the SDA
line during the acknowledge clock pulse, so that
the SDA line is stable LOW during this clock pulse.
The peripheral which has been addressed has to
generate an acknowledge after the reception of
each byte, other-wise the SDA line remains at the
HIGH level during the ninth clock pulse time. In
this case the master transmitter can generate the
STOP information in order to abort the transfer.
The LNBP21 won't gen-erate the acknowledge if
the Vcc supply is below the Undervoltage Lockout
threshold (6.7V typ.).
(LNBP21)
that
TRANSMISSION WITHOUT ACKNOWLEDGE
Avoiding to detect the acknowledge of the
LNBP21, the μP can use a simpler transmission:
simply it waits one clock without checking the
slave acknowledging, and sends the new data.
This approach of course is less protected from
misworking and decreases the noise immunity.
270μH
15 ohm
see Note 2
LNBP21
Vup
Gate
Vin
12V
L1=22μH
Sense
C2
220μF
Vcc
LT1
Master STB
Vo
LT2
DETIN
(Note 1)
C8
10nF
to LNB
SDA
SCL
DSQOUT
DSQIN(Note 1)
ADDRESS
Byp
C5
470nF
GND
0<Vaddr<V
Byp
EXTM
C6
10nF
R
sc
0.1
C3
Ceramic
D1 1N4001
C1
220μF
C4
470nF
Ceramic
D2
BAT43
C7
10nF
STS4DNFS30L
IC2
(Note 3)
IC1
(Note 4)
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相關(guān)代理商/技術(shù)參數(shù) |
參數(shù)描述 |
|---|---|
| LNBP21PD-TR | 功能描述:其他電源管理 LNB Supply/Cont IC RoHS:否 制造商:Texas Instruments 輸出電壓范圍: 輸出電流:4 mA 輸入電壓范圍:3 V to 3.6 V 輸入電流: 功率耗散: 工作溫度范圍:- 40 C to + 110 C 安裝風(fēng)格:SMD/SMT 封裝 / 箱體:VQFN-48 封裝:Reel |
| LNBP8 | 制造商:STMICROELECTRONICS 制造商全稱:STMicroelectronics 功能描述:LNB Supply and control voltage regulator |
| LNBP8_06 | 制造商:STMICROELECTRONICS 制造商全稱:STMicroelectronics 功能描述:LNB Supply and control voltage regulator |
| LNBP8K7 | 制造商:STMICROELECTRONICS 制造商全稱:STMicroelectronics 功能描述:LNB Supply and control voltage regulator |
| LNBP8K7-R | 功能描述:IC LNB SUPPLY & CONTROL SPAK-7 RoHS:是 類別:集成電路 (IC) >> PMIC - 穩(wěn)壓器 - 專用型 系列:- 產(chǎn)品培訓(xùn)模塊:Lead (SnPb) Finish for COTS Obsolescence Mitigation Program 標(biāo)準(zhǔn)包裝:2,000 系列:- 應(yīng)用:電源，ICERA E400，E450 輸入電壓:4.1 V ~ 5.5 V 輸出數(shù):10 輸出電壓:可編程 工作溫度:-40°C ~ 85°C 安裝類型:表面貼裝 封裝/外殼:42-WFBGA，WLCSP 供應(yīng)商設(shè)備封裝:42-WLP 包裝:帶卷 (TR) |
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