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參數(shù)資料
| 型號： | LOG100JP |
| 廠商： | TEXAS INSTRUMENTS INC |
| 元件分類： | 模擬運算功能 |
| 英文描述： | LOG OR ANTILOG AMPLIFIER, 0.045 MHz BAND WIDTH, CDIP14 |
| 封裝： | HERMETIC SEALED, CERAMIC, DIP-14 |
| 文件頁數(shù)： | 10/11頁 |
| 文件大?。?/td> | 112K |
| 代理商： | LOG100JP |
LOG100
8
FIGURE 7. Output Offset Nulling.
ADJUSTMENTS OF SCALE FACTOR K
The value of K may be changed by increasing or decreasing
the voltage divider resistor normally connected to the out-
put, pin 7. To increase K put resistance in series between pin
7 and the appropriate scaling resistor pin (3, 4 or 5). To
decrease K place a parallel resistor between pin 2 and either
pin 3, 4 or 5.
APPLICATION INFORMATION
WIRING PRECAUTIONS
In order to prevent frequency instability due to lead induc-
tance of the power supply lines, each power supply should
be bypassed. This should be done by connecting a 10
F
tantalum capacitor in parallel with a 1000pF ceramic capaci-
tor from the +V
CC
and –V
CC
pins to the power supply
common. The connection of these capacitors should be as
close to the LOG100 as practical.
CAPACITIVE LOADS
Stable operation is maintained with capacitive loads of up to
100pF, typically. Higher capacitive loads can be driven if a
22
carbon resistor is connected in series with the LOG100’s
output. This resistor will, of course, form a voltage divider
with other resistive loads.
CIRCUIT PROTECTION
The LOG100 can be protected against accidental power
supply reversal by putting a diode (1N4001 type) in series
with each power supply line as shown in Figure 8. This
precaution is necessary only in power systems that momen-
tarily reverse polarity during turn-on or turn-off. If this
protection circuit is used, the accuracy of the LOG100 will
be degraded slightly by the voltage drops across the diodes
as determined by the power supply sensitivity specification.
The LOG100 uses small geometry FET transistors to achieve
the low input bias currents. Normal FET handling
DATA COMPRESSION
In many applications the compressive effects of the logarith-
mic transfer function is useful. For example, a LOG100
preceding an 8-bit analog-to-digital converter can produce
equivalent 20-bit converter operation.
SELECTING OPTIMUM VALUES OF I
2 AND K
In straight log applications (as opposed to log ratio), both K
and I
2 are selected by the designer. In order to minimize
errors due to output offset and noise, it is normally best to
FIGURE 8. Reverse Polarity Protection.
6
9
–V
CC
+V
CC
LOG100
I
2
I
1
14
1
5
43
6
10
7
V
OUT
9
–V
CC
+V
CC
C
+
–
LOG100
I
1 = I2
2
R
1
100k
10k
–V
CC
+V
CC
FIGURE 9. Absorbance Measurement.
techniques should be used to avoid damage caused by low
energy electrostatic discharge (ESD).
LOG RATIO
One of the more common uses of log ratio amplifiers is to
measure absorbance. A typical application is shown in
Figure 9.
Absorbance of the sample is A = log
(22)
If
λ
2 = λ1 and D1 and D2 are matched A ∝ K log
. (23)
λ
1
λ
1'
I
2
I
1
I
2
I
1
14
1
5
43
6
10
7
V
OUT
9
–V
CC
+V
CC
C
+
–
LOG100
D
2
D
1
Sample
λ
1
λ
1
λ
2
Light
Source
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