參數(shù)資料
型號(hào)： LP2950-33LP
廠商： Texas Instruments, Inc.
英文描述： ADJUSTABLE MICROPOWER VOLTAGE REGULATORS WITH SHUTDOWN
中文描述： 可調(diào)微功耗電壓調(diào)節(jié)器具有關(guān)斷
文件頁(yè)數(shù)： 16/26頁(yè)
文件大?。?/td> 2721K
代理商： LP2950-33LP
www.ti.com
Capacitor Types
Most tantalum or aluminum electrolytics are suitable for use at the input. Film-type capacitors also work, but at
higher cost. When operating at low temperature, care should be taken with aluminum electrolytics, as their
electrolytes often freeze at –30
°
C. For this reason, solid tantalum capacitors should be used at temperatures
below –25
°
C.
Ceramic capacitors can be used, but due to their low ESR (as low as 5 m
to 10 m
), they may not meet the
minimum ESR requirement previously discussed. If a ceramic capacitor is used, a series resistor between 0.1
to 2
must be added to meet the minimum ESR requirement. In addition, ceramic capacitors have one glaring
disadvantage that must be taken into account — a poor temperature coefficient, where the capacitance can vary
significantly with temperature. For instance, a large-value ceramic capacitor (
≥
2.2
μ
F) can lose more than half of
its capacitance as temperature rises from 25
°
C to 85
°
C. Thus, a 2.2-
μ
F capacitor at 25
°
C drops well below the
minimum C
OUT
required for stability as ambient temperature rises. For this reason, select an output capacitor
that maintains the minimum 2.2-
μ
F required for stability for the entire operating temperature range.
C
BYPASS
: Noise and Stability Improvement
In the LP2951, an external FEEDBACK pin directly connected to the error amplifier noninverting input can allow
stray capacitance to cause instability by shunting the error amplifier feedback to GND, especially at high
frequencies. This is worsened if high-value external resistors are used to set the output voltage, because a high
resistance allows the stray capacitance to play a more significant role; i.e., a larger RC time delay is introduced
between the output of the error amplifier and its FEEDBACK input, leading to more phase shift and lower phase
margin. A solution is to add a 100-pF bypass capacitor (C
BYPASS
) between OUTPUT and FEEDBACK; because
C
BYPASS
is in parallel with R1, it lowers the impedance seen at FEEDBACK at high frequencies, in effect
offsetting the effect of the parasitic capacitance by providing more feedback at higher frequencies. More
feedback forces the error amplifier to work at a lower loop gain, so C
OUT
should be increased to a minimum of
3.3
μ
F to improve the regulator’s phase margin.
C
can be also used to reduce output noise in the LP2951. This bypass capacitor reduces the closed loop
gain of the error amplifier at the high frequency, so noise no longer scales with the output voltage. This
improvement is more noticeable with higher output voltages, because loop gain reduction is greatest. A suitable
C
BYPASS
is calculated as shown in
Equation 1
:
f
(CBYPASS)
200 Hz
C
BYPASS
1
2
R1
200 Hz
(1)
ERROR Function (LP2951 Only)
The LP2951 has a low-voltage detection comparator that outputs a logic low when the output voltage drops by
≈
6% from its nominal value, and outputs a logic high when V
OUT
has reached
≈
95% of its nominal value. This
95% of nominal figure is obtained by dividing the built-in offset of
≈
60 mV by the 1.235-V bandgap reference,
and remains independent of the programmed output voltage. For example, the trip-point threshold (ERROR
output goes high) typically is 4.75 V for a 5-V output and 11.4 V for a 12-V output. Typically, there is a hysteresis
of 15 mV between the thresholds for high and low ERROR output.
LP2950
,
LP2951
ADJUSTABLE MICROPOWER VOLTAGE REGULATORS
WITH SHUTDOWN
SLVS582D–APRIL 2006–REVISED MARCH 2007
APPLICATION INFORMATION (continued)
On the 3-pin LP2950, noise reduction can be achieved by increasing the output capacitor, which causes the
regulator bandwidth to be reduced, therefore, eliminating high-frequency noise. However, this method is
relatively inefficient, as increasing C
OUT
from 1
μ
F to 220
μ
F only reduces the regulator’s output noise from
430
μ
V to 160
μ
V (over a 100-kHz bandwidth).
A timing diagram is shown in
Figure 1
for ERROR vs V
OUT
(5 V), as V
IN
is ramped up and down. ERROR
becomes valid (low) when V
IN
≈
1.3 V. When V
IN
≈
5 V, V
OUT
= 4.75 V, causing ERROR to go high. Because the
dropout voltage is load dependent, the output trip-point threshold is reached at different values of V
, depending
on the load current. For instance, at higher load current, ERROR goes high at a slightly higher value of V
IN
, and
vice versa for lower load current. The output-voltage trip point remains at
≈
4.75 V, regardless of the load. Note
that when V
≤
1.3 V, the ERROR comparator output is turned off and pulled high to its pullup voltage. If V
is
used as the pullup voltage, rather than an external 5-V source, ERROR typically is
≈
1.2 V. In this condition, an
equal resistor divider (10 k
is suitable) can be tied to ERROR to divide down the voltage to a valid logic low
during any fault condition, while still enabling a logic high during normal operation.
16
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