參數(shù)資料
型號(hào)： LP2975AIMM-3.3
廠商： NATIONAL SEMICONDUCTOR CORP
元件分類(lèi)： 模擬信號(hào)調(diào)理
英文描述： Quadruple 2-Input Exclusive-OR Gates 14-SOIC -40 to 85
中文描述： SPECIALTY ANALOG CIRCUIT, PDSO8
封裝： MINI, SOP-8
文件頁(yè)數(shù)： 11/19頁(yè)
文件大小： 715K
代理商： LP2975AIMM-3.3
Application Hints
(Continued)
FET in low power designs. Because of the increased cell
density (and tiny packages) used by modern FET’s, the cur-
rent carrying capability may easily exceed the power dissipa-
tion limits of the package. It is possible to parallel two or
more FET’s, which divides the power dissipation among all
of the packages.
It should be noted that the “heatsink” for a surface mount
package is the copper of the PC board and the package itself
(direct radiation).
Surface-mount devices have the value of
θ
specified for a
typical PC board mounting on their data sheet. In most cases
it is best to start with the known data for the application (P
D
,
T
, T
) and calculate the required value of
θ
needed. This
value will define the type of FET and, possibly, the heatsink
required for cooling.
θ
J-A
= (T
J
T
A
)/P
D
(MAX)
DESIGN EXAMPLE:
A design is to be done with V
= 5V
and V
= 3.3V with a maximum load current of 300 mA.
Based on these conditions, power dissipation in the FET dur-
ing normal operation would be:
P
D
= (V
IN
V
OUT
) x I
LOAD
Solving, we find that P
= 0.51W. Assuming that the maxi-
mum allowable value of T
is 150C and the maximum T
A
is
70C, the value of
θ
J-A
is found to be
157C/W
.
However, if this design must survive a continuous short on
the output, the power dissipated in the FET is higher:
P
D
(SC) = V
IN
x I
SC
= 5 x 0.33 =
1.65W
(This assumes the current sense resistor is selected for an
I
SC
value that is 10% higher than the required 0.3A).
The value of
θ
required to survive continuous short circuit
is calculated to be
49C/W
.
Having solved for the value(s) of
θ
, a FET can be se-
lected. It should be noted that a FET must be used with a
θ
J-A
value less than or equal to the calculated value.
HIGH POWER (
≥
2W) APPLICATIONS:
As power dissipa-
tion increases above 2W, a FET in a larger package must be
used to obtain lower values of
θ
. The same formulae de-
rived in the previous section are used to calculate P
D
and
θ
J-A
.
Having found
θ
, it becomes necessary to calculate the
value of
θ
(the heatsink-to-ambient thermal resistance) so
that a heatsink can be selected:
θ
S-A
=
θ
J-A
(
θ
J-C
+
θ
C-S
)
Where:
θ
is the
junction-to-case thermal resistance.
This pa-
rameter is the measure of thermal resistance between the
semiconductor die inside the FET and the surface of the
case of the FET where it mounts to the heatsink (the value of
θ
can be found on the data sheet for the FET). A typical
FET in a TO-220 package will have a
θ
value of approxi-
mately 2–4C/W, while a device in a TO-3 package will be
about 0.5–2C/W.
θ
is the
case-to-heatsink thermal resistance,
which
measures how much thermal resistance exists between the
surface of the FET and the heatsink.
θ
is dependent on
the package type and mounting method. A TO-220 package
with mica insulator and thermal grease secured to a heatsink
will have a
θ
value in the range of 1–1.5C/W. A TO-3
package mounted in the same manner will have a
θ
C-S
value
of 0.3–0.5C/W. The best source of information for this is
heatsink catalogs (Wakefield, AAVID, Thermalloy) since they
also sell mounting hardware.
θ
is the
heatsink-to-ambient thermal resistance,
which
defines how well a heatsink transfers heat into the air. Once
this is determined, a heatsink must be selected which has a
value which is less than or equal to the computed value. The
value of
θ
is usually listed in the manufacturer’s data
sheet for a heatsink, but the information is sometimes given
in a graph of temperature rise vs. dissipated power.
DESIGN EXAMPLE:
A design is to be done which takes
3.3V in and provides 2.5V out at a load current of 7A. The
power dissipation will be calculated for both normal opera-
tion and short circuit conditions.
For normal operation:
P
D
= (V
IN
V
OUT
) x I
LOAD
=
5.6W
If the output is shorted to ground:
P
D
(SC) = V
IN
x I
SC
= 3.3 x 7.7 =
25.4W
(Assuming that a sense resistor is selected to set the value
of I
SC
10% above the nominal 7A).
θ
will be calculated assuming a maximum T
A
of 70C and
a maximum T
J
of 150C:
θ
J-A
= (T
J
T
A
)/P
D
(MAX)
For normal operation:
θ
J-A
= (150 70) / 5.6 =
14.3C/W
For designs which must operate with the output shorted to
ground:
θ
J-A
= (150 70) / 25.4 =
3.2C/W
The value of 14.3C/W can be easily met using a TO-220 de-
vice. Calculating the value of
θ
required (assuming a
value of
θ
J-C
= 3C/W and
θ
C-S
= 1C/W):
θ
S-A
=
θ
J-A
(
θ
J-C
+
θ
C-S
)
θ
S-A
= 14.3 (3 + 1) =
10.3C/W
Any heatsink may be used with a thermal resistance
≤
10.3C/W
@
5.6W power dissipation (refer to manufacturer’s
data sheet curves). Examples of suitable heatsinks are Ther-
malloy #6100B and IERC #LATO127B5CB.
However, if the design must survive a sustained short on the
output, the calculated
θ
value of 3.2C/W eliminates the
possibility of using a TO-220 package device.
Assuming a TO-3 device is selected with a
θ
value of
1.5C/W and
θ
C-S
= 0.4C/W, we can calculate the required
value of
θ
S-A
:
θ
S-A
=
θ
J-A
(
θ
J-C
+
θ
C-S
)
θ
S-A
= 3.2 (1.5 + 0.4) =
1.3C/W
A
θ
value
≤
1.3C/W would require a relatively large heat-
sink, or possibly some kind of forced airflow for cooling.
SHORT-CIRCUIT CURRENT LIMITING
Short-circuit current limiting is easiliy implemented using a
single external resistor (R
SC
). The value of R
SC
can be cal-
culated from:
R
SC
= V
CL
/ I
SC
Where:
I
SC
is the desired
short circuit current.
V
CL
is the
current limit sense voltage.
The value of V
is 57 mV (typical), with guaranteed limits
listed in the Electrical Characteristics section. When doing a
worst-case calculation for power dissipation in the FET, it is
important to consider both the tolerance of V
CL
and the toler-
ance (and temperature drift) of R
SC
.
www.national.com
11
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