- 您現(xiàn)在的位置：買賣IC網(wǎng) > PDF目錄358919 > LP2994 (National Semiconductor Corporation) DDR Termination Regulator PDF資料下載
參數(shù)資料
| 型號： | LP2994 |
| 廠商： | National Semiconductor Corporation |
| 英文描述： | DDR Termination Regulator |
| 中文描述： | DDR終端穩(wěn)壓器 |
| 文件頁數(shù)： | 10/15頁 |
| 文件大?。?/td> | 257K |
| 代理商： | LP2994 |
Typical Application Circuits
Several different application circuits have been shown in
Figure 4 through Figure 13 to illustrate some of the options
that are possible in configuring the LP2994. Graphs of the
individual circuit performance can be found in the Typical
Performance Characteristics section in the beginning of the
datasheet. These curves illustrate how the maximum output
current is affected by changes in AVIN and PVIN.
SSTL-2 Applications
For the majority of applications that implement the SSTL-2
termination scheme, it is recommended to connect all the
input rails to the 2.5V rail. This provides an optimal trade-off
between power dissipation and component count and selec-
tion. An example of this circuit can be seen in Figure 4
If power dissipation or efficiency is a major concern then the
LP2994 has the ability to operate on split power rails. The
output stage (PVIN) can be operated on a lower rail such as
1.8V and the analog circuitry (AVIN) can be connected to a
higher rail such as 2.5V, 3.3V or 5V. This allows the internal
power dissipation to be lowered when sourcing current from
VTT. The disadvantage of this circuit is that the maximum
continuous current is reduced because of the lower rail
voltage, although it is adequate for all motherboard SSTL-2
applications. Increasing the output capacitance can also
help if periods of large load transients will be encountered.
The third option for SSTL-2 applications in the situation that
a 1.8V rail is not available and it is not desirable to use 2.5V,
is to connect the LP2994 power rail to 3.3V. In this situation
AVIN will be limited to operation on the 3.3V or 5V rail as
PVIN can never exceed AVIN. This configuration has the
ability to provide the maximum continuous output current at
the downside of higher thermal dissipation. Care should be
taken to prevent the LP2994 from experiencing large current
levels which cause the junction temperature to exceed the
maximum. Because of this risk it is not recommended to
supply the output stage with a voltage higher than a nominal
3.3V rail.
20045904
FIGURE 4. Recommended SSTL-2 Implementation
20045905
FIGURE 5. Lower Power Dissipation SSTL-2 Implementation
L
www.national.com
10
相關(guān)PDF資料 |
PDF描述 |
|---|---|
| LP2994M | DDR Termination Regulator |
| LP2994MX | DDR Termination Regulator |
| LP2995LQX | DDR Termination Regulator |
| LP2995MX | DDR Termination Regulator |
| LP2995MR | DDR Termination Regulator |
相關(guān)代理商/技術(shù)參數(shù) |
參數(shù)描述 |
|---|---|
| LP2994EVAL | 功能描述:其他開發(fā)工具 LP2994 EVAL BOARD RoHS:否 制造商:Parallax 產(chǎn)品:ELEV-8 Hex Upgrade Kits 類型:Robotics 工具用于評估:ELEV-8 Quadcopter 工作電源電壓: |
| LP2994M/NOPB | 功能描述:IC DDR TERMINATION REG 8SOIC RoHS:是 類別:集成電路 (IC) >> PMIC - 穩(wěn)壓器 - 專用型 系列:- 產(chǎn)品培訓(xùn)模塊:Lead (SnPb) Finish for COTS Obsolescence Mitigation Program 標(biāo)準(zhǔn)包裝:2,000 系列:- 應(yīng)用:電源，ICERA E400，E450 輸入電壓:4.1 V ~ 5.5 V 輸出數(shù):10 輸出電壓:可編程 工作溫度:-40°C ~ 85°C 安裝類型:表面貼裝 封裝/外殼:42-WFBGA，WLCSP 供應(yīng)商設(shè)備封裝:42-WLP 包裝:帶卷 (TR) |
| LP2994M/NOPB | 制造商:Texas Instruments 功能描述:Linear Voltage Regulator IC |
| LP2994MX/NOPB | 功能描述:IC REGULATOR DDR TERM 8-SOIC RoHS:是 類別:集成電路 (IC) >> PMIC - 穩(wěn)壓器 - 專用型 系列:- 產(chǎn)品培訓(xùn)模塊:Lead (SnPb) Finish for COTS Obsolescence Mitigation Program 標(biāo)準(zhǔn)包裝:2,000 系列:- 應(yīng)用:電源，ICERA E400，E450 輸入電壓:4.1 V ~ 5.5 V 輸出數(shù):10 輸出電壓:可編程 工作溫度:-40°C ~ 85°C 安裝類型:表面貼裝 封裝/外殼:42-WFBGA，WLCSP 供應(yīng)商設(shè)備封裝:42-WLP 包裝:帶卷 (TR) |
| LP2995LQ | 功能描述:低壓差穩(wěn)壓器 - LDO RoHS:否 制造商:Texas Instruments 最大輸入電壓:36 V 輸出電壓:1.4 V to 20.5 V 回動電壓（最大值）:307 mV 輸出電流:1 A 負(fù)載調(diào)節(jié):0.3 % 輸出端數(shù)量: 輸出類型:Fixed 最大工作溫度:+ 125 C 安裝風(fēng)格:SMD/SMT 封裝 / 箱體:VQFN-20 |
發(fā)布緊急采購，3分鐘左右您將得到回復(fù)。